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參數(shù)資料
| 型號： | PCI1620PDV |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 32/164頁 |
| 文件大?。?/td> | 720K |
| 代理商： | PCI1620PDV |
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2
–
16
Table 2
–
10. Multifunction and Miscellaneous Terminals
TERMINAL
NAME
NO.
I/O
DESCRIPTION
PDV
GHK
CLK48
81
W11
I
48-MHz clock input. This clock is used as a clock source for internal microcontroller.
MFUNC0
156
D19
I/O
Multifunction terminal 0. MFUNC0 can be configured as parallel PCI interrupt INTA, GPI0, GPO0, socket
activity LED output, ZV switching outputs, CardBus audio PWM, GPE, or a parallel IRQ. See
Section 4.38,
Multifunction Routing Status Register
, for configuration details.
MFUNC1
157
A16
I/O
Multifunction terminal 1. MFUNC1 can be configured as parallel PCI interrupt INTB, GPI1, GPO1, socket
activity LED output, ZV switching outputs, CardBus audio PWM, GPE, or a parallel IRQ. See
Section 4.38,
Multifunction Routing Status Register
, for configuration details.
Serial data (SDA). When LATCH is detected low during GRST, the MFUNC1 terminal provides the SDA
signaling for the serial bus interface. The two-terminal serial interface loads the subsystem identification
and other register defaults from an EEPROM after a PCI reset. See Section 3.4.4,
Loading the
Subsystem Identification (EEPROM Interface)
, for details on other serial bus applications.
MFUNC2
159
E14
I/O
Multifunction terminal 2. MFUNC2 can be configured as GPI2, GPO2, socket activity LED output, ZV
switching outputs, CardBus audio PWM, GPE, RI_OUT, or a parallel IRQ. See Section 4.38,
Multifunction Routing Status Register
, for configuration details.
MFUNC3/
IRQSER
160
F13
I/O
Multifunction terminal 3. MFUNC3 can be configured as a parallel IRQ or the serialized interrupt signal
IRQSER. See Section 4.38,
Multifunction Routing Status Register
, for configuration details.
MFUNC4
161
B15
I/O
Multifunction terminal 4. MFUNC4 can be configured as PCI LOCK, GPI3, GPO3, socket activity LED
output, ZV switching outputs, CardBus audio PWM, GPE, RI_OUT, or a parallel IRQ. See Section 4.38,
Multifunction Routing Status Register
, for configuration details.
Serial clock (SCL). When LATCH is detected low during GRST, the MFUNC4 terminal provides the SCL
signaling for the serial bus interface. The two-terminal serial interface loads the subsystem identification
and other register defaults from an EEPROM after a PCI reset. See Section 3.4.4,
Loading the
Subsystem Identification (EEPROM Interface)
, for details on other serial bus applications.
MFUNC5
162
A15
I/O
Multifunction terminal 5. MFUNC5 can be configured as GPI4, GPO4, socket activity LED output, ZV
switching outputs, CardBus audio PWM, GPE, or a parallel IRQ. See Section 4.38,
Multifunction Routing
Status Register
, for configuration details.
MFUNC6/
CLKRUN
163
C14
I/O
Multifunction terminal 6. MFUNC6 can be configured as a PCI CLKRUN or a parallel IRQ. See
Section 4.38,
Multifunction Routing Status Register
, for configuration details.
RI_OUT/PME
165
E13
O
Ring indicate out and power-management event output. Terminal provides an output for ring-indicate
or PME signals.
SPKROUT
152
F14
O
Speaker output. SPKROUT is the output to the host system that can carry SPKR or CAUDIO through
the PCI1620 from the PC Card interface. SPKROUT is driven as the exclusive-OR combination of card
SPKR//CAUDIO inputs.
SUSPEND
158
C15
I
Suspend. SUSPEND protects the internal registers from clearing when the GRST or PRST signal is
asserted. See Section NO TAG,
Suspend Mode
, for details.
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