參數(shù)資料
型號(hào): PCI1520-EP
英文描述: Military Enhanced Plastic PC Card Controllers Data Manual
中文描述: 軍事增強(qiáng)塑料PC卡控制器數(shù)據(jù)手冊(cè)
文件頁(yè)數(shù): 44/125頁(yè)
文件大?。?/td> 716K
代理商: PCI1520-EP
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3
16
Table 3
9. Interrupt Mask and Flag Registers
CARD TYPE
EVENT
MASK
FLAG
16 bit memory
16-bit memory
Battery conditions (BVD1, BVD2)
ExCA offset 05h/45h/805h bits 1 and 0
ExCA offset 04h/44h/804h bits 1 and 0
Wait states (READY)
ExCA offset 05h/45h/805h bit 2
ExCA offset 04h/44h/804h bit 2
16 bit I/O
16-bit I/O
Change in card status (STSCHG)
ExCA offset 05h/45h/805h bit 0
ExCA offset 04h/44h/804h bit 0
Interrupt request (IREQ)
Always enabled
PCI configuration offset 91h bit 0
All 16-bit PC
Cards
Power cycle complete
ExCA offset 05h/45h/805h bit 3
ExCA offset 04h/44h/804h bit 3
Change in card status (CSTSCHG)
Socket mask bit 0
Socket event bit 0
CardBus
Interrupt request (CINT)
Always enabled
PCI configuration offset 91h bit 0
Power cycle complete
Card insertion or removal
Socket mask bit 3
Socket mask bits 2 and 1
Socket event bit 3
Socket event bits 2 and 1
Functional interrupt events are valid only for 16-bit I/O and CardBus cards; that is, the functional interrupts are not
valid for 16-bit memory cards. Furthermore, card insertion and removal-type CSC interrupts are independent of the
card type.
Table 3
10. PC Card Interrupt Events and Description
CARD TYPE
EVENT
TYPE
SIGNAL
DESCRIPTION
Battery conditions
(BVD1, BVD2)
CSC
BVD1(STSCHG)//CSTSCHG
A transition on BVD1 indicates a change in the
PC Card battery conditions.
16-bit
memory
BVD2(SPKR)//CAUDIO
A transition on BVD2 indicates a change in the
PC Card battery conditions.
Wait states
(READY)
CSC
READY(IREQ)//CINT
A transition on READY indicates a change in the
ability of the memory PC Card to accept or provide
data.
16 bit I/O
16-bit I/O
Change in card
status (STSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of STSCHG indicates a status change
on the PC Card.
Interrupt request
(IREQ)
Functional
READY(IREQ)//CINT
The assertion of IREQ indicates an interrupt request
from the PC Card.
CardBus
Change in card
status (CSTSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of CSTSCHG indicates a status
change on the PC Card.
Interrupt request
(CINT)
Functional
READY(IREQ)//CINT
The assertion of CINT indicates an interrupt request
from the PC Card.
All PC Cards
Card insertion
or removal
CSC
CD1//CCD1,
CD2//CCD2
A transition on either CD1//CCD1 or CD2//CCD2
indicates an insertion or removal of a 16-bit or
CardBus PC Card.
Power cycle
complete
CSC
N/A
An interrupt is generated when a PC Card power-up
cycle has completed.
The naming convention for PC Card signals describes the function for 16-bit memory, I/O cards, and CardBus. For
example, READY(IREQ)//CINT includes READY for 16-bit memory cards, IREQ for 16-bit I/O cards, and CINT for
CardBus cards. The 16-bit memory card signal name is first, with the I/O card signal name second, enclosed in
parentheses. The CardBus signal name follows after a double slash (//).
The
1997 PC Card Standard
describes the power-up sequence that must be followed by the PCI1520 when an
insertion event occurs and the host requests that the socket V
CC
and V
PP
be powered. Upon completion of this
power-up sequence, the PCI1520 interrupt scheme can be used to notify the host system (see Table 3
10), denoted
by the power cycle complete event. This interrupt source is considered a PCI1520 internal event, because it depends
on the completion of applying power to the socket rather than on a signal change at the PC Card interface.
相關(guān)PDF資料
PDF描述
PCI1620GHK Controller Miscellaneous - Datasheet Reference
PCI1620PDV Controller Miscellaneous - Datasheet Reference
PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
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