參數(shù)資料
型號(hào)： PCI1520-EP
英文描述： Military Enhanced Plastic PC Card Controllers Data Manual
中文描述： 軍事增強(qiáng)塑料PC卡控制器數(shù)據(jù)手冊(cè)
文件頁數(shù)： 39/125頁
文件大小： 716K
代理商： PCI1520-EP
3
–
11
Table 3
–
6. CardBus Socket Registers
REGISTER NAME
OFFSET
Socket event
00h
Socket mask
04h
Socket present state
08h
Socket force event
0Ch
Socket control
10h
Reserved
14h
–
1Ch
Socket power management
20h
3.6
Serial-Bus Interface
The PCI1520 provides a serial-bus interface to load subsystem identification information and selected register
defaults from a serial EEPROM, and to provide a PC Card power-switch interface alternative to P
2
C. See
Section 3.5.2,
P
2
C Power-Switch Interface (TPS222X)
, for details. The PCI1520 serial-bus interface is compatible
with various I
2
C and SMBus components.
3.6.1
Serial-Bus Interface Implementation
The PCI1520 defaults to serial bus interface are disabled. To enable the serial interface, a pulldown resistor must
be implemented on the LATCH terminal and the appropriate pullup resistor must be implemented on the SDA and
SCL signals, that is, the MFUNC1 and MFUNC4 terminals. When the interface is detected, bit 3 (SBDETECT) in the
serial bus control and status register (see Section 4.48) is set. The SBDETECT bit is cleared by a writeback of 1.
The PCI1520 implements a two-terminal serial interface with one clock signal (SCL) and one data signal (SDA). When
a pulldown resistor is provided on the LATCH terminal, the SCL signal is mapped to the MFUNC4 terminal and the
SDA signal is mapped to the MFUNC1 terminal. The PCI1520 drives SCL at nearly 100 kHz during data transfers,
which is the maximum specified frequency for standard mode I
2
C. The serial EEPROM must be located at address
A0h. Figure 3
–
8 illustrates an example application implementing the two-wire serial bus.
Serial
EEPROM
PCI1520
MFUNC4
MFUNC1
LATCH
SCL
SDA
VCC
A1
A0
A2
Figure 3
–
8. Serial EEPROM Application
Some serial device applications may include PC Card power switches, ZV source switches, card ejectors, or other
devices that may enhance the user
’
s PC Card experience. The serial EEPROM device and PC Card power switches
are discussed in the sections that follow.
3.6.2
Serial-Bus Interface Protocol
The SCL and SDA signals are bidirectional, open-drain signals and require pullup resistors as shown in Figure 3
–
8.
The PCI1520, which supports up to 100-Kb/s data-transfer rate, is compatible with standard mode I
2
C using 7-bit
addressing.
All data transfers are initiated by the serial bus master. The beginning of a data transfer is indicated by a start
condition, which is signaled when the SDA line transitions to low state while SCL is in the high state, as illustrated
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