參數(shù)資料
型號(hào)： PCI1520-EP
英文描述： Military Enhanced Plastic PC Card Controllers Data Manual
中文描述： 軍事增強(qiáng)塑料PC卡控制器數(shù)據(jù)手冊(cè)
文件頁數(shù)： 25/125頁
文件大?。?/td> 716K
代理商： PCI1520-EP
2
–
13
Table 2
–
11. 16-Bit PC Card Interface Control Terminals (Slots A and B)
TERMINAL
NUMBER
SLOT
A
NAME
SLOT
B
I/O
DESCRIPTION
GHK
GHK
BVD1
(STSCHG/RI)
H14
U09
I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that include batteries. BVD1
is used with BVD2 as an indication of the condition of the batteries on a memory PC Card. Both BVD1
and BVD2 are high when the battery is good. When BVD2 is low and BVD1 is high, the battery is weak
and should be replaced. When BVD1 is low, the battery is no longer serviceable and the data in the
memory PC Card is lost. See Section 5.6,
ExCA Card Status-Change Interrupt Configuration
Register
, for enable bits. See Section 5.5,
ExCA Card Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the status bits for this signal.
Status change. STSCHG is used to alert the system to a change in the READY, write protect, or
battery voltage dead condition of a 16-bit I/O PC Card.
Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.
BVD2
(SPKR)
H17
V09
I
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that include batteries. BVD2
is used with BVD1 as an indication of the condition of the batteries on a memory PC Card. Both BVD1
and BVD2 are high when the battery is good. When BVD2 is low and BVD1 is high, the battery is weak
and should be replaced. When BVD1 is low, the battery is no longer serviceable and the data in the
memory PC Card is lost. See Section 5.6,
ExCA Card Status-Change Interrupt Configuration
Register
, for enable bits. See Section 5.5,
ExCA Card Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the status bits for this signal.
Speaker. SPKR is an optional binary audio signal available only when the card and socket have been
configured for the 16-bit I/O interface. The audio signals from cards A and B are combined by the
PCI1520 and are output on SPKROUT.
CD1
CD2
U11
G18
H05
P09
I
Card detect 1 and card detect 2. CD1 and CD2 are internally connected to ground on the PC Card.
When a PC Card is inserted into a socket, CD1 and CD2 are pulled low. For signal status, see
Section 5.2,
ExCA Interface Status Register
.
CE1
CE2
V14
U14
K05
L02
O
Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered address bytes. CE1
enables even-numbered address bytes, and CE2 enables odd-numbered address bytes.
INPACK
K17
R07
I
Input acknowledge. INPACK is asserted by the PC Card when it can respond to an I/O read cycle
at the current address.
IORD
V15
L05
O
I/O read. IORD is asserted by the PCI1520 to enable 16-bit I/O PC Card data output during host I/O
read cycles.
IOWR
R14
M01
O
I/O write.
IOWR is driven low by the PCI1520 to strobe write data into 16-bit I/O PC Cards during host
I/O write cycles.
Terminal name for slot A is preceded with A_. For example, the full name for terminals 130 and K17 is A_INPACK.
Terminal name for slot B is preceded with B_. For example, the full name for terminals 61 and R07 is B_INPACK.
相關(guān)PDF資料
PDF描述
PCI1620GHK Controller Miscellaneous - Datasheet Reference
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PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
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