參數(shù)資料
型號(hào): MT16LSDT12864AG-133XX
元件分類(lèi): DRAM
英文描述: 128M X 64 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168
封裝: MO-161, DIMM-168
文件頁(yè)數(shù): 6/28頁(yè)
文件大小: 954K
代理商: MT16LSDT12864AG-133XX
PDF: 09005aef8088b2e3/Source: 09005aef8088077a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SD8_16C64_128x64AG.fm - Rev. C 6/05 EN
14
2002 Micron Technology, Inc. All rights reserved.
512MB (SR), 1GB (DR): (x64) 168-Pin SDRAM UDIMM
Absolute Maximum Ratings
Stresses greater than those listed may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
DC Operating Specifications
Table 9:
Absolute Maximum DC Ratings
Parameter
Min
Max
Unit
Voltage on VDD, VDDQ supply relative to VSS
-1
+4.6
V
Voltage on inputs NC or I/O pins relative to VSS
-1
+4.6
V
Operating temperature TOPR (commercial - ambient)
. 0
+65
°C
Storage temperature (plastic)
-55
+150
°C
Table 10:
DC Electrical Characteristics and Operating Conditions – 512MB
Notes:1, 5, 6; notes appear on page 18; VDD = VDDQ = +3.3V ±0.3V
Parameter/Condition
Symbol
Min
Max
Units
Notes
Supply voltage
VDD, VDDQ3
3.6
V
Input high voltage: Logic 1; All inputs
VIH
2VDD + 0.3
V
Input low voltage: Logic 0; All inputs
VIL
-0.3
0.8
V
Input leakage current:
Any input 0V
≤ VIN ≤ VDD
(All other pins not under test = 0V)
Command and
address Inputs, CKE
II
-40
40
A
CK, S#
-20
20
A
DQMB
-5
5
A
Output leakage current: DQ pins are
disabled; 0V
≤ VOUT ≤ VDDQ
DQ
IOZ
-5
5
A
Output levels:
Output high voltage (IOUT = -4mA)
Output low voltage (IOUT = 4mA)
VOH
2.4
V
VOL
–0.4
V
Table 11:
DC Electrical Characteristics and Operating Conditions – 1GB
Notes: 1, 5, 6; notes appear on page 18; VDD = VDDQ = +3.3V ±0.3V
Parameter/Condition
Symbol
Min
Max
Units
Notes
Supply voltage
VDD, VDDQ3
3.6
V
Input high voltage: Logic 1; All inputs
VIH
2VDD + 0.3
V
Input low voltage: Logic 0; All inputs
VIL
-0.3
0.8
V
Input leakage current:
Any input 0V
≤ VIN ≤ VDD
(All other pins not under test = 0V)
Command and
address Inputs, CKE
II
-80
80
A
CK, S#
-20
20
A
DQMB
-10
10
A
Output leakage current: DQ pins are
disabled; 0V
≤ VOUT ≤ VDDQ
DQ
IOZ
-10
10
A
Output levels:
Output high voltage (IOUT = -4mA)
Output low voltage (IOUT = 4mA)
VOH
2.4
V
VOL
–0.4
V
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