
1-8
MCF5249UM
MOTOROLA
MCF5249 Functional Overview
Audio can be routed from a receiver to a transmitter without the data being processed by the core so the
audio bus can be used as a digital audio data switch. The audio bus can also be used for audio format
conversion.
1.6.12
CD-ROM ENCODER/DECODER
The MCF5249 is capable of processing CD-ROM sectors in hardware. Processing is compliant with
CD-ROM and CD-ROM XA standards.
The CD-ROM decoder performs following functions in hardware:
Sector sync recognition
Descrambling of sectors
Verification of the CRC checksum for Mode 1, Mode 2 Form 1, and Mode 2 Form 2 sectors
Third-layer error correction is not performed
The CD-ROM encoder performs following functions in hardware:
Sector sync recognition
Scrambling of sectors
Insertion of the CRC checksum for Mode 1, Mode 2 Form 1, and Mode 2 Form 2 sectors.
Third-layer error encoding needs to be done in software. This can use approximately 5-10 Mhz of
performance for single-speed.
1.6.13
DUAL UART MODULE
Two full-duplex UARTs with independent receive and transmit buffers are in this module. Data formats can
be 5, 6, 7, or 8 bits with even, odd, or no parity, and up to 2 stop bits in 1/16 increments. Four-byte receive
buffers and two-byte transmit buffers minimize CPU service calls. The Dual UART module also provides
several error-detection and maskable-interrupt capabilities. Modem support includes request-to-send
(RTS) and clear-to-send (CTS) lines.
The system clock provides the clocking function from a programmable prescaler. Users can select full
duplex, auto-echo loopback, local loopback, and remote loopback modes. The programmable Dual UARTs
can interrupt the CPU on various normal or error-condition events.
1.6.14
QUEUED SERIAL PERIPHERAL INTERFACE QSPI
The QSPI module provides a serial peripheral interface with queued transfer capability. It supports up to 16
stacked transfers at a time, making CPU intervention between transfers unnecessary. Transfers of up to
17.5 Mbits/second are possible at a CPU clock of 140 MHz. The QSPI supports master mode operation
only.
1.6.15
TIMER MODULE
The timer module includes two general-purpose timers, each of which contains a free-running 16-bit timer
for use in any of three modes:
1. Input Capture. This mode captures the timer value with an external event.
2. Output Compare. This mode triggers an external signal or interrupts the CPU when the timer
reaches a set value
3. Event Counter. This mode counts external events.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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