
17-4
MCF5249UM
MOTOROLA
Every pending audio interrupt will show up as a ‘1’ in register InterruptStat or InterruptStat3. The interrupt
will cause the associated interrupt to go active if the corresponding bit in InterruptEn is set to ‘1‘. Most
interrupts are cleared by writing a ‘1’ to the corresponding bit in InterruptClear register.
Table 17-1 Interrupt Register Addresses
ADDRESS
MBAR2+
NAME
WIDTH
DESCRIPTION
RESET
VALUE
ACCES
S
0x94:0x97
InterruptEn
32
Interrupt enable register
0
RW
0x98:0x9B
InterruptStat
32
Interrupt status register
-
R
0x98:0x9B
InterruptClear
32
Interrupt clear register
-
W
0xE4:0xE7
InterruptEn3
32
Interrupt enable register
RW
0xE0:0xE3
InterruptStat3
32
Interrupt status register
-
R
0xE0:0xE3
InterruptClear3
32
Interrupt clear register
-
W
Table 17-2 Interrupt Register Description
BIT
INTERRUPT
NAME
DESCRIPTION
VECTOR
HOW TO
CLEAR
31
IIS1TXUNOV
iis1 transmit fifo under / over
31
reg. IntClear
30
IIS1TXRESYN
iis1 transmit fifo resync
30
reg. IntClear
29
IIS2TXUNOV
iis2 transmit fifo under / over
29
reg. IntClear
28
IIS2TXRESYN
iis2 transmit fifo resync
28
reg. IntClear
27
EBUTXUNOV
IEC958 transmit fifo under / over
27
reg. IntClear
26
EBUTXRESYN
IEC958 transmit fifo resync
26
reg. IntClear
25
EBU1CNEW
IEC958-1 receiver new C channel
received
25
reg. IntClear
24
EBU1VALNOGOOD
IEC958-1 receiver validity bit not set
24
reg. IntClear
23
EBU1SYMERR
IEC958-1 receiver symbol error
23
reg. IntClear
22
EBU1BITERR
IEC958-1 receiver parity bit error
23
reg. IntClear
21
UCHANTXEMPTY
U channel transmit register is empty
21
write to tx reg
20
UCHANTXUNDER
U channel transmit register underrun
20
reg. IntClear
19
UCHANTX
NEXTFIRST
U channel transmit register next byte will
be first
19
write to Tx reg
18
U1CHANRCVFULL
U1ChannelReceive register full
18
read Rcv reg
17
U1CHANRCVOVER
U1ChannelReceive register overrun
23
reg. IntClear
16
Q1CHANRCVFULL
Q1ChannelReceive register full
18
read rcv reg
15
Q1CHANRCVOVER
Q1ChannelReceive register overrun
13
reg. IntClear
14
UQ1CHANSYNC
U/Q channel sync found
18
reg. IntClear
13
UQ1CHANERR
U/Q channel framing error
13
reg IntClear
12
PDIR1UNOV
processor data in 1 under / over
12
reg IntClear
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.