參數(shù)資料
型號(hào)： MC92610VF
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324
封裝： 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324
文件頁數(shù)： 87/104頁
文件大?。?/td> 1595K
代理商： MC92610VF
MOTOROLA
Chapter 7. Package Description
7-9
MC92610 Chip Pinout Listing
XMIT_D_2
Transmitter D, Data bit 2
A7
Input
HSTL
XMIT_D_3
Transmitter D, Data bit 3
B8
Input
HSTL
XMIT_D_4
Transmitter D, Data bit 4
C9
Input
HSTL
XMIT_D_5
Transmitter D, Data bit 5
E9
Input
HSTL
XMIT_D_6
Transmitter D, Data bit 6
A8
Input
HSTL
XMIT_D_7
Transmitter D, Data bit 7
B9
Input
HSTL
XMIT_D_K
Transmitter D, Special Character (Data bit 8
for TBI mode)
A9
Input
HSTL
XMIT_D_IDLE
Transmitter D, Idle Enable Bar, (Data bit 9 for
TBI mode)
C10
Input
HSTL
XMIT_D_CLK
Transmitter D, Transmit Interface Clock
B10
Input
HSTL
RECV_D_0
Receiver D, Data bit 0
E2
Output
HSTL
RECV_D_1
Receiver D, Data bit 1
E3
Output
HSTL
RECV_D_2
Receiver D, Data bit 2
D1
Output
HSTL
RECV_D_3
Receiver D, Data bit 3
D2
Output
HSTL
RECV_D_4
Receiver D, Data bit 4
D3
Output
HSTL
RECV_D_5
Receiver D, Data bit 5
C2
Output
HSTL
RECV_D_6
Receiver D, Data bit 6
B2
Output
HSTL
RECV_D_7
Receiver D, Data bit 7
A1
Output
HSTL
RECV_D_K
Receiver D, Special Character (Data bit 8 for
TBI mode)
D5
Output
HSTL
RECV_D_9
Receiver D, Data bit 9 for TBI mode
C3
Output
HSTL
RECV_D_IDLE
Receiver D, Idle Detect
A2
Output
HSTL
RECV_D_ERR
Receiver D, Error Detect
A3
Output
HSTL
RECV_D_CLK
Receiver D, Receive Data Clock
D4
Output
HSTL
XCVR_D_RSEL
Transceiver D, Redundant Link Select
P12
Input
CMOS
XCVR_D_DISABLE
Transceiver D, Disable
A14
Input
CMOS
RLINK_D0_P
Receiver D, Primary Positive Link Input
B18
Input
Link
RLINK_D0_N
Receiver D, Primary Negative Link Input
A18
Input
Link
RLINK_D1_P
Receiver D, Redundant Positive Link Input
B16
Input
Link
RLINK_D1_N
Receiver D, Redundant Negative Link Input
A16
Input
Link
XLINK_D0_P
Transmitter D, Primary Positive Link Out
D17
Output
Link
XLINK_D0_N
Transmitter D, Primary Negative Link Out
C17
Output
Link
XLINK_D1_P
Transmitter D, Redundant Positive Link Out
D15
Output
Link
Table 7-2. 324 MAPBGA Signal to Ball Mapping (continued)
Signal Name
Description
Ball Number
(324 MAPBGA)
Direction
I/O Type
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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