參數(shù)資料
型號： MC92610VF
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324
封裝： 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324
文件頁數(shù)： 74/104頁
文件大小： 1595K
代理商： MC92610VF
MOTOROLA
Chapter 6. Electrical Specifications and Characteristics
6-9
AC Electrical Characteristics
6.3.5
Serial Data Link Timing
The following Figure 6-8 and Table 6-11 describe the link differential output timing.
The following Figure 6-9 and Table 6-12 describe the link differential output timing.
Tj
RECV_x_CLK jitter
-
400 1, 5
ps
-720 3, 5
ps
1 Measured between 50-50 percent points, 156.25MHz REF_CLK, full speed DDR (HSE = low).
2 Includes jitter component.
3 Measured between 50-50 percent points, 78.125MHz REF_CLK, half speed DDR (HSE = high).
4 Measured between 10-90 percent points.
5 Total peak-to-peak jitter.
Figure 6-8. Link Differential Output Timing Diagram
Table 6-11. Link Differential Output Specification
Symbol
Characteristic
Min
Max
Unit
Tj
1
1 Measured between 50-50 percent points.
Total jitter
-
0.35
UI
Tdj
Deterministic jitter
-
0.17
UI
Tds
Differential skew
-
15
ps
Xla
2
t
2 Rising edge REF_CLK_P to bit 0 transmit.
Transmit latency
150
190
bit-times
Figure 6-9. Link Differential Input Timing Diagram
Table 6-10. Recovered Clock Specification (continued)
Symbol
Characteristic
Min
Max
Unit
Tj
Tds
XLINK0/1_x_N
XLINK0/1_x_P
Tdstol
RLINK0/1_x_N
RLINK0/1_x_P
Tjtol
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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