參數(shù)資料
型號(hào)： MC92610VF
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA324
封裝： 19 X 19 MM, 1.76 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034AAG-1, MAPBGA-324
文件頁(yè)數(shù)： 70/104頁(yè)
文件大?。?/td> 1595K
代理商： MC92610VF
6-6
MC92610 SERDES User’s Manual
MOTOROLA
AC Electrical Characteristics
The following Figure 6-4 and Table 6-7 describe the receiver SDR interface timing.
.
6.3.2
Word Synchronization Bus Timing
The following Figure 6-5 and Table 6-8 describe the word synchronization bus timing.
Tf
3
Output fall time
-
1.0
ns
Tr
Output rise time
-
1.0
ns
1 Full speed, 156.25MHz operation (HSE = low).
2 Half-speed, 78.125MHz operation (HSE = high).
3 10pF output load.
Figure 6-4. Receiver Interface SDR Timing Diagram (LME = High, DDRE = Low)
Table 6-7. Receiver SDR Timing Specification (LME = High, DDRE = Low)
Symbol
Characteristic
Min
Max
Unit
T1
Output valid time before rising edge of RECV_x_CLK
4.16 1
1 Full speed, 156.25MHz operation (HSE = low).
-ns
7.36 2
2 Half-speed, 78.125MHz operation (HSE = high).
-ns
T2
Output valid time after rising edge of RECV_x_CLK
0.96 1
-ns
0.96 2
-ns
Table 6-6. Receiver DDR Timing Specification (continued)
Symbol
Characteristic
Min
Max
Unit
RECV_x_CLK
RECV_x_7-0
RECV_x_K
RECV_x_IDLE
RECV_x_ERR
RECV_x_9
T1
T2
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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