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MOTOROLA
MC68349 USER'S MANUAL
4- 43
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* Set up default module base address value
MOVEQ.L
#7,D0
MBAR is in CPU space
MOVEC.L
D0,DFC
load DFC to indicate CPU space
MOVE.L
#MODBASE+$101,D0
Set address, AS7, and valid bit
MOVES.L
D0,MBAR
write to MBAR
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* Set up system protection register:
* Software watchdog disabled, double bus fault monitor disabled, bus
* monitor BERR after 64 clocks.
MOVE.B
#7,SYPCR+MODBASE
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* Clock synthesizer control register:
* Switch from 8.3 to 16.7 MHZ
MOVE.W
#$7F80,SYNCR+MODBASE
X>1 doubles the default speed
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* Module configuration register:
* When FREEZE is asserted, software watchdog and periodic interrupt timer
* are disabled, bus monitor is enabled. Port B = 4 IRQs, 4 chip selects.
* Show Cycles enabled, external arbitration enabled. Supervisor/user
* SIM registers unrestricted, Interrupt Arbitration at priority $F
MOVE.W
#$420F,MCR+MODBASE
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* Now, set up Address masks and base addresses for the chip selects:
LEA
CSAM0+MODBASE,A0
Point to CS0 addr. mask location.
MOVEQ
#7,D
Set up a loop counter.
LEA
CSAM0$,A1
Point to addr mask memory location.
LOOP MOVE.L
(A1)+,(A0)+
Init. addr mask and base addr reg
DBRA
D0,LOOP
JMP.L
USER_INIT
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* Data table for chip select initialization
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* CS0 - EPROM - 00060000-0007ffff, 3-wait states, 16-bit, NCS, write protect
CSAM0$
DC.L
$0001FFFD
CSBAR0$
DC.L
$00060008
* CS1 - RAM - 00000000-0000ffff, 32-bit fast termination, NCS
CSAM1$
DC.L
$0000FFFC
CSBAR1$
DC.L
$00000007
* CS2 - external device - 00FFE8xx, external termination, NCS
CSAM2$
DC.L
$000000F3
CSBAR2$
DC.L
$00FFE803
* CS3 - secondary memory - 00000000-0003ffff, 1-wait states, 8-bit term, NCS
CSAM3$
DC.L
$0003FFF6
CSBAR3$
DC.L
$00000003
********************************************************************************
END