11/3/95
SECTION 1: OVERVIEW
UM Rev 1
MOTOROLA
MC68349 USER'S MANUAL
xvii
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
3-34
Bus Arbitration Flowchart for Single Request .............................................. 3-54
3-35
Bus Arbitration Timing—Idle Bus Case ....................................................... 3-54
3-36
Bus Arbitration Timing—Active Bus Case ................................................... 3-55
3-37
Bus Arbitration State Diagram ...................................................................... 3-58
3-38
Show Cycle Timing ...................................................................................... 3-59
3-39
Timing for External Devices Driving RESET ............................................... 3-60
3-40
Power-Up Reset Timing Power-Up Reset ................................................... 3-61
4-1
SIM49 Module Register Block ...................................................................... 4-3
4-2
System Configuration and Protection Function ............................................ 4-5
4-3
Software Watchdog Block Diagram ............................................................. 4-7
4-4
Clock Block Diagram for Crystal Operation.................................................. 4-11
4-5
MC68349 Crystal Oscillator ......................................................................... 4-11
4-6
Clock Block Diagram for External Oscillator Operation................................ 4-12
4-7
Full Interrupt Request Multiplexer ................................................................ 4-19
4-8
SIM49 Programming Model ......................................................................... 4-22
5-1
CPU32+ Block Diagram .............................................................................. 5-4
5-2
Loop Mode Instruction Sequence ................................................................ 5-4
5-3
System Block Diagram ................................................................................. 5-7
5-4
Instruction Cache ......................................................................................... 5-8
5-5
Instruction Cache Word State Diagram........................................................ 5-9
5-6
CIC SRAM Block Diagram ........................................................................... 5-10
5-7
CIC Programming Model .............................................................................. 5-11
5-8
User Programming Model ............................................................................ 5-14
5-9
Supervisor Programming Model Supplement .............................................. 5-14
5-10
Status Register............................................................................................. 5-15
5-11
Table Example 1 .......................................................................................... 5-19
5-12
Table Example 2 .......................................................................................... 5-20
5-13
Table Example 3 .......................................................................................... 5-22
5-14
Exception Stack Frame ................................................................................ 5-31
5-15
Reset Operation Flowchart .......................................................................... 5-33
5-16
Format $0—Four-Word Stack Frame .......................................................... 5-50
5-17
Format $2—Six-Word Stack Frame ............................................................. 5-50
5-18
Internal Transfer Count Register .................................................................. 5-51
5-19
Format $C—Bus Error Stack ....................................................................... 5-52
5-20
Format $C—Bus Error Stack on MOVEM Operand ..................................... 5-52
5-21
Format $C—Four- and Six-Word Bus Error Stack ....................................... 5-53
5-22
In-Circuit Emulator Configuration ................................................................. 5-54
5-23
Bus State Analyzer Configuration ................................................................ 5-54
5-24
BDM Block Diagram ..................................................................................... 5-55
5-25
BDM Command Execution Flowchart .......................................................... 5-58