- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383304 > M5M4V4S40CTP-12 (Mitsubishi Electric Corporation) 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | M5M4V4S40CTP-12 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| 中文描述： | 4分（2 -銀行甲131072字x 16位）同步DRAM |
| 文件頁數(shù)： | 28/45頁 |
| 文件大小： | 1458K |
| 代理商： | M5M4V4S40CTP-12 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
28
M5M4V4S40CTP-12, -15
Feb ‘97
Preliminary
MITSUBISHI LSIs
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev. 0.3)
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70°C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, unless otherwise noted)
NOTES:
1. Icc (max) is specified at the output open condition.
I
I
Symbol
Parameter
Test Conditions
Limits(max)
Unit
-12
-15
Icc1s*1
operating current, single bank tRC=min, tCLK=min, BL=1, CL=3
90
75
mA
Icc1d*1
operating current, dual bank
tRC=min, tCLK=min, BL=1, CL=3
130
110
mA
Icc2h
standby current, CKE=H
both banks idle, tCLK=min, CKE=H
18
16
mA
Icc2l
standby current, CKE=L
both banks idle, tCLK=min, CKE=L
2
2
mA
Icc3
active standby current
both banks active, tCLK=min, CKE=H
35
30
mA
Icc4*1
burst current
tCLK=min, BL=4, CL=3, 1 bank idle
120
100
mA
Icc5
auto-refresh current
tRC=min, tCLK=min
60
50
mA
Icc6
self-refresh current
CKE <0.2v
1
1
mA
Symbol
Parameter
Test Conditions
Limits
Unit
Min.
Max.
VOH (DC)
High-Level Output Voltage (DC)
IOH=-2mA
2.4
V
VOL (DC)
Low-Level Output Voltage (DC)
IOL= 2mA
0.4
V
IOZ
Off-state Output Current
Q floating VO=0 ~ VddQ
-10
10
μA
Input Current
VIH = 0 ~ VddQ+0.3V
-10
10
μA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M5M4V4S40CTP-15 | 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10L | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10 | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M4V64S30ATP-12 | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8 | 30V N-Channel PowerTrench MOSFET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V4S40CTP-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S20ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。