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參數(shù)資料
| 型號(hào)： | M5M4V4S40CTP-12 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| 中文描述： | 4分（2 -銀行甲131072字x 16位）同步DRAM |
| 文件頁數(shù)： | 26/45頁 |
| 文件大?。?/td> | 1458K |
| 代理商： | M5M4V4S40CTP-12 |
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M5M4V4S40CTP-12, -15
Feb ‘97
Preliminary
MITSUBISHI LSIs
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
MITSUBISHI ELECTRIC
SDRAM (Rev. 0.3)
DQMU / DQML CONTROL
DQMU and DQML are used to mask write data and disable read data. During write operations, DQMU
and DQML mask the upper and lower bytes of input, respectively. The DQMU and DQML write mask is
applied in the same clock cycle. During read operations, DQMU and DQML are used to “Hi-Z” the upper
and lower bytes of output data, respectively. The DQMU and DQML to output “Hi-Z” latency is two, i.e.,
the output will be “Hi-Z” at the rising edge of second clock after DQM is applied.
DQMU/DQML Function
CLK
Command
DQ(0-7)
Write
D0
D2
D3
DQML
READ
Q0
Q1
Q3
masked by DQML=High
disabled by DQML=High
DQ(8-15)
D0
D1
D3
DQMU
Q0
Q2
Q3
masked by DQMU=High
disabled by DQMU=High
相關(guān)PDF資料 |
PDF描述 |
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| M5M4V4S40CTP-15 | 4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10L | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-10 | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| M5M4V64S30ATP-12 | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8 | 30V N-Channel PowerTrench MOSFET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V4S40CTP-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S20ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S20ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
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