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參數(shù)資料
| 型號： | M32185F4VFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 237/1032頁 |
| 文件大小： | 5750K |
| 代理商： | M32185F4VFP |
DMAC
9
9-36
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
9.2 DMAC Related Registers
DMA0–4 Interrupt Request Mask Register (DM04ITMK)
<Address: H’0080 0401>
9
1011121314
b15
b8
DMITMK4 DMITMK3
DMITMK1 DMITMK0
DMITMK2
00000
0
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
8–10
No function assigned. Fix to "0."
00
11
DMITMK4 (DMA4 interrupt request mask bit)
0: Enable interrupt request
R
W
12
DMITMK3 (DMA3 interrupt request mask bit)
1: Mask (disable) interrupt request
13
DMITMK2 (DMA2 interrupt request mask bit)
14
DMITMK1 (DMA1 interrupt request mask bit)
15
DMITMK0 (DMA0 interrupt request mask bit)
DMA5–9 Interrupt Request Mask Register (DM59ITMK)
<Address: H’0080 0409>
9
1011121314
b15
b8
DMITMK9 DMITMK8
DMITMK6 DMITMK5
DMITMK7
00000
0
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
8–10
No function assigned. Fix to "0."
00
11
DMITMK9 (DMA9 interrupt request mask bit)
0: Enable interrupt request
R
W
12
DMITMK8 (DMA8 interrupt request mask bit)
1: Mask (disable) interrupt request
13
DMITMK7 (DMA7 interrupt request mask bit)
14
DMITMK6 (DMA6 interrupt request mask bit)
15
DMITMK5 (DMA5 interrupt request mask bit)
The DMA Interrupt Request Mask Register is used to mask interrupt requests on each DMA channel.
(1) DMITMKn (DMAn Interrupt Request Mask) bit (n = 0–9)
Setting the DMAn interrupt request mask bit to "1" masks the interrupt requests on DMAn channel.
However, if an interrupt request occurs, the DMAn interrupt request status bit is always set to "1"
irrespective of the contents of this mask register.
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