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參數(shù)資料
| 型號(hào)： | LSIFC909 |
| 英文描述： | LSIFC909 Fibre Channel I/O Processor technical manual v2.1 8/00 |
| 中文描述： | LSIFC909光纖通道I / O處理器技術(shù)手冊(cè)2.1 8 / 00 |
| 文件頁(yè)數(shù)： | 84/144頁(yè) |
| 文件大小： | 1496K |
| 代理商： | LSIFC909 |
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5-28
Registers
Register: 0x30
Host Interrupt Status
Read Only
The
Host Interrupt Status
register provides read only interrupt status
information to the PCI host. A write of any value to this register will clear
the interrupt associated with the System Doorbell.
IOPDS
IOP Doorbell Status (Read Only)
This bit when set to 1 indicates that the IOP has received
a System->IOP Doorbell message but has not yet
processed it (has not cleared the corresponding SysReq
interrupt).
31
R
Reserved (Read Only)
Reserved for future use.
[30:4]
RI
Reply Interrupt (Read Only)
Reply Interrupt – set to 1 when:
Std reply option – whenever the ReplyPostFIFO is not
empty.
Alt reply option – whenever the
Host Index
register is
not equal to the ReplyPostWrPtr register.
3
If this bit is set to 1 and the corresponding mask bit in the
Host Interrupt Mask
is cleared to 0, a PCI INTA/ interrupt
will be generated.
R
Reserved (Read Only)
Reserved for future use.
[2:1]
DI
Doorbell Interrupt (Read Only)
System Doorbell Interrupt – set to 1 when the IOP writes
a value to the System Doorbell. Cleared by a write of any
value to this register. If this bit is set to 1 and the
0
31
30
16
IOPDS
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
4
3
2
1
0
R
RI
R
DI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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