參數(shù)資料
型號(hào): LSIFC909
英文描述: LSIFC909 Fibre Channel I/O Processor technical manual v2.1 8/00
中文描述: LSIFC909光纖通道I / O處理器技術(shù)手冊2.1 8 / 00
文件頁數(shù): 17/144頁
文件大?。?/td> 1496K
代理商: LSIFC909
Hardware Overview
1-5
The LSIFC909 provides the performance and flexibility to meet
tomorrow’s FC connectivity requirements.
The LSIFC909 and the LSI Logic software drivers provide superior
performance and lower host CPU overhead than other competitive
solutions. Because of its high level of integration and streamlined
architecture, the LSIFC909 provides the highest level of performance in
a more overall cost effective FC solution.
Figure 1.2
shows the functional block diagram for the LSIFC909. The
architecture maximizes performance and flexibility by deploying fixed
gates in critical performance areas and utilizing dual ARM RISC
processors (one for context management and the second in the IOP).
Each of the major blocks is briefly described below.
Figure 1.2
LSIFC909 Functional Block Diagram
PCI
Bus
TX[9:0]
RX[9:0]
Tx
Context
Managers
(ARM)
Transmit
Buffers
Frame
Transmitter
Data
Mover
Bus
Interface
Unit
UPI-64
32/64
Link
Controller
Frame
Receiver
Receive
Buffers
Integrated
Transceiver
Rx
External Memory
Controller
Protocol Engine
(ARM)
Flash
ROM
Serial
EEPROM
SSRAM
= Data Path
= Control Path
LSIFC909
Internal Module Bus
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