參數(shù)資料
型號: LSIFC909
英文描述: LSIFC909 Fibre Channel I/O Processor technical manual v2.1 8/00
中文描述: LSIFC909光纖通道I / O處理器技術(shù)手冊2.1 8 / 00
文件頁數(shù): 68/144頁
文件大小: 1496K
代理商: LSIFC909
5-12
Registers
Register: 0x08
Class Code/Revision ID
Read/Write
ClCode
Class Code (Read Only)
This register is used to identify the generic function of the
device. The upper byte of this register is a base class
code, the middle byte is a subclass code, and the lower
byte identifies a specific register level programming
interface. The value defaults to 0x0E0001 unless
firmware programs it to a different value prior to PCI
configuration, or it gets changed using serial EPROM.
[31:8]
RevID
Revision ID (Read Only)
This register specifies device and revision identifiers. In
the LSIFC909, the upper nibble will be 0b0000. The lower
nibble reflects the current revision level of the device.
[7:0]
31
16
ClCode (Most Significant)
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
15
8
7
0
ClCode (Least Significant)
RevID
0
0
0
0
0
0
0
1
0
0
0
0
x
x
x
x
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