參數(shù)資料
型號: LSIFC909
英文描述: LSIFC909 Fibre Channel I/O Processor technical manual v2.1 8/00
中文描述: LSIFC909光纖通道I / O處理器技術(shù)手冊2.1 8 / 00
文件頁數(shù): 114/144頁
文件大?。?/td> 1496K
代理商: LSIFC909
6-26
Specifications
Figure 6.17 Flash ROM Write Timing Waveforms
Table 6.19
Flash ROM Write Timings
Symbol
Parameter
Min
Max
Unit
t
cyc
MCLK cycle time
18.821
18.825
ns
t
as
Address setup time
16
18
ns
t
ah
Address hold time
1
2
1
1. The user can program the address hold time to be either 1 MCLK or 2 MCLKs (default = 2).
2. The user can program the write setup time to be between 2 MCLKs and 9 MCLKs (default = 9).
MCLK
t
ws
Write setup time
2
9
2
MCLK
t
wh
Write hold time
37
ns
Addr()
Addr(x)
Addr(y)
Read/Write
Data
t
cyc
Idle or
S-Xfer
F-Addr
F-Addr
F-Wait(n)
n = 9
F-Data
Idle
F-Addr
F-Addr
Data(x)
t
as
Data(y)
t
ws
t
ah
t
wh
F-Turn
MCLK
MA
MD
FLASHCS/
MOE[1]/
BWE[3]/
M-STATE
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