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參數(shù)資料
| 型號： | IXF1010 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 10 CHANNEL(S), 1000M bps, LOCAL AREA NETWORK CONTROLLER, CBGA552 |
| 封裝： | 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-552 |
| 文件頁數(shù)： | 39/116頁 |
| 文件大?。?/td> | 1392K |
| 代理商： | IXF1010 |
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10-Port 100/1000 Mbps Ethernet MAC — IXF1010
Preliminary Datasheet
29
Document #: 249839
Revision #: 001
Rev. Date: April 29, 2002
3.2.3
Training Sequence for Dynamic Phase Alignment (Data Path Deskew)
3.2.3.1
Training at Start-up
The SPI4-2 Specification states that on power-up or after a reset, the training sequence (as defined
in the SPI4-2 Specification) is sent indefinitely by the source side until it receives valid FIFO status
on the FIFO bus. The specification also states that it is possible for the bus deskew to be completed
after one training sequence takes place. Due to some inadequacies in the specification, it is unlikely
that the bus can be deskewed in a single training sequence due to the presence of both random and
deterministic jitter. The only way to account for the random element is to determine an average
over repeated training sequences. Since the required number of repeats is dependent on several
characteristics of the system in which the IXF1010 is being used, power on training (or training
following loss of synchronization) will continue until synchronization is achieved and the calendar
is provisioned. The length of power on training will not be a fixed number of repeats.
The number of training sequence repeats could be a fairly large number (16, 32 or 64). If this is
necessary every time training is required, a significant use of interface bandwidth is needed just to
train and deskew the data path. This is only done at power-up or reset for an optimal starting point
interface. After this, periodic training is used to provide a better adjustment and a substantially
lower bandwidth overhead.
3.2.3.2
Periodic Training
A scheduled training sequence is sent at least once every pre-configured bounded interval
(DATA_MAX_T) on both the transmit and receive paths. These training sequences are used by the
receiving end of each interface for deskewing bit arrival times on the data and control lines. The
sequence allows the receiving end to correct for relative skew difference of up to +/- 1 bit time. The
training sequence consists of one (1) idle control word followed by one or more repetitions of a 20-
word training pattern consisting of 10 (repeated) training-control words.
The initial idle control word removes dependencies of the DIP-4 in the training control words from
preceding data words. Assuming a maximum of +/- bit time alignment jitter on each line, and a
maximum of +/- bit time relative skew between lines, there are at least eight bit times when a
receiver can detect a training control word prior to deskew. The training data word is chosen to be
orthogonal to the training control word. In the absence of bit errors in the training pattern, a
receiver should be able to successfully deskew the data and control lines with one training pattern.
The sending side of the data path on both the transmit and receive interfaces must schedule the
training sequence at least once every DATA_MAX_T cycles.
Note:
DATA_MAX_T may be set to zero, disabling periodic training on the interface (refer to Table 87,
“SPI4-2 RX Training Register (Addr: 0x701)” on page 112). This is done when a system shows
very little drift during normal operation, and no fine-grain correction on an on-going basis is
needed. This allows the maximum possible bandwidth for data transfer. The transmit and receive
interface training sequences are scheduled independently.
3.2.3.3
Training in a Practical Implementation
The OIF Standard states that it should be possible to train and deskew the data input in a single
training cycle. However, from the research carried out and the variances in jitter and skew due to
board layout and clock tolerance issues, some sort of averaging over several repeated training
patterns are required to reliably determine the optimal point at which to capture the incoming data.
This is true for both static alignment and dynamic phase alignment. Therefore, several training
patterns are required for an average. The more training patterns, the more accurate the average.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IXF102A | 功能描述:IRIX II GREY HEADLAMP 5LED FLOOD RoHS:是 類別:工具 >> 閃光燈 系列:Irix™ II 標準包裝:1 系列:- 類型:筆形手電筒 燈類型:LED 燈輸出:- 特點:可變強度 電池大小:AA（需要 1 個） 長度:- 主體材料:- |
| IXF-10A15AF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15AT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15BF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-10A15BT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
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