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參數(shù)資料
| 型號(hào)： | IXF1010 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 10 CHANNEL(S), 1000M bps, LOCAL AREA NETWORK CONTROLLER, CBGA552 |
| 封裝： | 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-552 |
| 文件頁(yè)數(shù)： | 38/116頁(yè) |
| 文件大?。?/td> | 1392K |
| 代理商： | IXF1010 |
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IXF1010 — 10-Port 100/1000 Mbps Ethernet MAC
28
Preliminary Datasheet
Document #: 249839
Revision #: 001
Rev. Date: April 29, 2002
3.2.2.4
Loss_Of_Sync
Loss_Of_Sync is a parameter specifying the number of consecutive framing calendar cycles
required to indicate a loss of synchronization and therefore restart training sequences. Table 88,
“SPI4-2 RX Calendar Register (Addr: 0x702)” on page 113, bits 11 to 8 specify this parameter. The
default value for Loss_Of_Sync is 3.
3.2.2.5
DATA_MAX_T
DATA_MAX_T is an RX SPI4-2 parameter specifying the interval between transmission of
periodic training sequences. Table 87, “SPI4-2 RX Training Register (Addr: 0x701)” on page 112,
bits 15 to 0 specify this parameter. The default value for DATA_MAX_T is 0x0000, which disables
periodic training sequence transmission.
3.2.2.6
REP_T
REP_T is an RX SPI4-2 parameter specifying the number of repetitions of the training sequence to
be scheduled every DATA_MAX_T interval. Table 87, “SPI4-2 RX Training Register (Addr:
0x701)” on page 112, bits 23 to 16 specify this parameter. The default value for REP_T is 0x00.
3.2.2.7
DIP4_UnLock
DIP4_UnLock is a TX SPI4-2 parameter specifying the number of consecutive incorrect DIP4
fields to be detected in order to declare loss of synchronization and drive TSTAT bus with framing.
Table 89, “SPI4-2 TX Synchronization Register (Addr: 0x703)” on page 113, bits 7 to 4 specify
this parameter. The default value for DIP4_UnLock is 0x4.
3.2.2.8
DIP4_Lock
DIP4_Lock is a TX SPI4-2 parameter specifying the number of consecutive correct DIP4 fields to
be detected in order to declare synchronization achieved and enable the calendar sequence.
Table 89, “SPI4-2 TX Synchronization Register (Addr: 0x703)” on page 113, bits 3 to 0 specify
this parameter. The default value for DIP4_Lock is 0x5.
3.2.2.9
MaxBurst1
MaxBurst1 is an RX SPI4-2 parameter specifying the maximum number of 16 byte blocks that
may be transmitted when the associated FIFO status indicates “starving”. Bits 24 to 16 of the
SPI4-2 RX Burst Size Register specify this parameter. The default value for MaxBurst1 is 0x006,
indicating a MaxBurst1 of 96 bytes (see Section 86, “SPI4-2 RX Burst Size Register (Addr:
3.2.2.10
MaxBurst2
MaxBurst2 is an RX SPI4-2 parameter specifying the maximum number of 16 byte blocks that
may be transmitted when the associated FIFO status indicates “hungry”. Bits 8 to 0 of the SPI4-2
RX Burst Size Register specify this parameter. The default value for MaxBurst2 is 0x002, indicat-
ing a MaxBurst1 of 32 bytes (see Section 86, “SPI4-2 RX Burst Size Register (Addr: 0x700)” on
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