參數(shù)資料
型號: ISP1583
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁數(shù): 7/87頁
文件大?。?/td> 420K
代理商: ISP1583
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
7 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
RESET_N
7
I
reset input (500
μ
s); a LOW level produces an asynchronous
reset; connect to V
CC(3V3)
for power-on reset (internal POR
circuit)
TTL; 5 V tolerant
[6]
end-of-transfer input (programmable polarity); used in DMA
slave mode only; when not in use, connect this pin to V
CC(I/O)
through a 10 k
resistor
input pad; TTL; 5 V tolerant
[6]
DMA request input or output (programmable polarity); the
signal direction depends on bit MASTER in register DMA
Hardware (see
Table 57
):
Input: DMA master if bit MASTER = 1
Output: DMA slave if bit MASTER = 0.
When not in use, in the default setting, this pin must be
connected to ground through a 10 k
resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
[6]
DMA acknowledge input or output (programmable polarity); the
signal direction depends on bit MASTER in register DMA
Hardware (see
Table 57
):
Input: DMA slave if bit MASTER = 0
Output: DMA master if bit MASTER = 1.
When not in use, in the default setting, this pin must be
connected to V
CC(I/O)
through a 10 k
resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
[6]
DMA read strobe input or output (programmable polarity); the
signal direction depends on bit MASTER in register DMA
Hardware (see
Table 57
):
Input: DMA slave if bit MASTER = 0
Output: DMA master if bit MASTER = 1.
When not in use, in the default setting, this pin must be
connected to V
CC(I/O)
through a 10 k
resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
[6]
DMA write strobe input or output (programmable polarity); the
signal direction depends on bit MASTER in register DMA
Hardware (see
Table 57
):
Input: DMA slave if bit MASTER = 0
Output: DMA master if bit MASTER = 1.
When not in use, in the default setting, this pin must be
connected to V
CC(I/O)
through a 10 k
resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
[6]
digital ground
interrupt request input; from the ATA/ATAPI peripheral; use a
10 k
resistor to pull-down
input pad; TTL; 5 V tolerant
[6]
EOT
8
I
DREQ
9
I/O
DACK
10
I/O
DIOR
11
I/O
DIOW
12
I/O
DGND
INTRQ
13
14
-
I
Table 2:
Symbol
[1]
Pin description
…continued
Pin
Type
[2]
Description
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