參數(shù)資料
型號(hào): ISP1583
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁(yè)數(shù): 66/87頁(yè)
文件大?。?/td> 420K
代理商: ISP1583
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
66 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
[2]
Excluding the first transition from the idle state.
Characterized only, not tested. Limits guaranteed by design.
High-speed mode
t
HSR
t
HSF
Data source timing
Full-speed mode
t
FEOPT
source EOP width
t
FDEOP
source differential data-to-EOP
transition skew
Receiver timing
Full-speed mode
t
JR1
receiver data jitter tolerance to
next transition
t
JR2
receiver data jitter tolerance for
paired transitions
t
FEOPR
receiver SE0 width
t
FST
width of SE0 during differential
transition
high-speed differential rise time
high-speed differential fall time
with captive cable
with captive cable
500
500
-
-
-
-
ps
ps
see
Figure 17
see
Figure 17
[2]
160
-
-
175
+5
ns
ns
[2]
2
see
Figure 18
[2]
18.5
-
+18.5
ns
see
Figure 18
[2]
9
-
+9
ns
accepted as EOP; see
Figure 17
rejected as EOP; see
Figure 19
[2]
82
-
-
-
14
ns
ns
[2]
-
Table 100: Dynamic characteristics: analog I/O pins DP and DM
…continued
V
CC(3V3)
= 3.3 V
±
0.3 V; V
GND
= 0 V; T
amb
=
40
°
C to +85
°
C; C
L
= 50 pF; R
PU
= 1.5 k
on DP to V
TERM
.; test circuit of
Figure 36
; unless otherwise specified.
Symbol Parameter
Conditions
Min.
Typ
Max
Unit
T
PERIOD
is the bit duration corresponding with the USB data rate.
Full-speed timing symbols have a subscript prefix ‘F’, low-speed timing symbols have a prefix ‘L.
Fig 17. Source differential data-to-EOP transition skew and EOP width.
mgr776
T
PERIOD
differential
data lines
crossover point
differential data to
SE0/EOP skew
N
×
T
PERIOD
+
t
DEOP
source EOP width: t
EOPT
receiver EOP width: t
EOPR
crossover point
extended
+
3.3 V
0 V
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