參數(shù)資料
型號(hào): ISP1583
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁數(shù): 60/87頁
文件大小: 420K
代理商: ISP1583
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
60 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.5.3
Frame Number register (address: 74h)
This read-only register contains the frame number of the last successfully received
Start-Of-Frame (SOF). The register contains 2 bytes, and the bit allocation is given in
Table 85
. In case of 8-bit access, the register content is returned lower byte first.
9.5.4
Scratch register (address: 78h)
This 16-bit register can be used by the firmware to save and restore information. For
example, the device status before it enters the suspend state. The bit allocation is
given in
Table 87
.
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
15
14
13
12
11
10
9
8
CHIPID[7:0]
1
1
R
7
0
0
R
6
0
0
R
5
0
0
R
4
VERSION[7:0]
1
1
R
0
0
R
3
0
0
R
2
1
1
R
1
0
0
R
0
0
0
R
0
0
R
1
1
R
0
0
R
0
0
R
0
0
R
0
0
R
Table 84:
Bit
23 to 16
15 to 8
7 to 0
Chip ID register: bit description
Symbol
CHIPID[15:8]
CHIPID[7:0]
VERSION[7:0]
Description
chip ID: lower byte (15h)
chip ID: upper byte (82h)
version number (30h)
Table 85:
Bit
Symbol
Power Reset
Bus Reset
Access
Bit
Symbol
Power Reset
Bus Reset
Access
Frame Number register: bit allocation
15
reserved
-
-
R
7
14
13
12
11
10
9
8
MICROSOF[2:0]
0
0
R
4
SOFR[10:8]
0
0
R
1
-
-
0
0
R
5
0
0
R
3
0
0
R
2
0
0
R
0
R
6
SOFR[7:0]
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
Table 86:
Bit
15 to 14
13 to 11
10 to 0
Frame Number register: bit description
Symbol
Description
-
reserved
MICROSOF[2:0]
microframe number
SOFR[10:0]
frame number
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