參數(shù)資料
型號: ISP1583
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁數(shù): 29/87頁
文件大小: 420K
代理商: ISP1583
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
29 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Buffer Length
Buffer Status
Control Function
Data Port
Endpoint MaxPacketSize
Endpoint Type.
Remark:
All reserved bits are not implemented. The bus and bus reset values are not
defined. Therefore, writing to these reserved bits will have no effect.
9.2 Initialization registers
9.2.1
Address register (address: 00h)
This register sets the USB assigned address and enables the USB device.
Table 19
shows the Address register bit allocation.
Bits DEVADDR will be cleared whenever a bus reset, a power-on reset or a soft reset
occurs. Bit DEVEN will be cleared whenever a power-on reset or a soft reset occurs,
and will be set after a bus reset.
In response to the standard USB request SET_ADDRESS, the firmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The
new
device address is activated when the device receives
acknowledgment from the host.
9.2.2
Mode register (address: 0Ch)
This register consists of 2 bytes (bit allocation: see
Table 21
).
The Mode register controls resume, suspend and wake-up behavior, interrupt activity,
soft reset, clock signals and SoftConnect operation.
Table 19:
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
7
DEVEN
0
1
R/W
6
5
4
3
2
1
0
DEVADDR[6:0]
0
0
R/W
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 20:
Bit
7
6 to 0
Address register: bit description
Symbol
DEVEN
DEVADDR[6:0]
Description
Logic 1 enables the device.
This field specifies the USB device address.
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