參數(shù)資料
型號: ISP1583
廠商: NXP Semiconductors N.V.
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: 高速通用串行總線外設(shè)控制器
文件頁數(shù): 51/87頁
文件大?。?/td> 420K
代理商: ISP1583
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
51 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
In 8-bit bus mode, the 16-bit Task File register 1F0 requires two consecutive
write/read accesses before the proper PIO write/read is generated on the IDE
interface. The first byte is always the lower byte (LSByte). Other Task File registers
can be directly accessed.
Writing to Task File registers can be done in any order except for the Task File
register 1F7, which must be written last.
Table 58:
Task file
1F0
1F1
1F2
1F3
1F4
1F5
1F6
1F7
3F6
3F7
Task File register functions
ATA function
data (16-bits)
error/feature
sector count
sector number/LBA[7:0]
cylinder low/LBA[15:8]
cylinder high/LBA[23:16]
drive/head/LBA[27:24]
command
alternate status/command
drive address
ATAPI function
data (16-bits)
error/feature
interrupt reason
reserved
cylinder low
cylinder high
drive select
status/command
alternate status/command
reserved
Table 59:
Task file
1F0
1F1
1F2
1F3
1F4
1F5
1F6
1F7
3F6
3F7
ATAPI peripheral register addressing
CS1_N
H
H
H
H
H
H
H
H
L
L
CS0_N
L
L
L
L
L
L
L
L
H
H
DA2
L
L
L
L
H
H
H
H
H
H
DA1
L
L
H
H
L
L
H
H
H
H
DA0
L
H
L
H
L
H
L
H
L
H
Table 60:
CS1_N = H, CS0_N = L, DA2 = L, DA1 = L, DA0 = L.
Bit
7
Symbol
Reset
0
Bus reset
0
Access
R/W
Task File 1F0 register (address: 40h): bit allocation
6
5
4
3
2
1
0
data (ATA or ATAPI)
0
0
R/W
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
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