參數(shù)資料
型號(hào)： intel386 SX
廠商： Intel Corp.
英文描述： 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器)
中文描述： 32位16位外部數(shù)據(jù)總線和24位外部地址總線CPU（帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器）
文件頁(yè)數(shù)： 87/102頁(yè)
文件大?。?/td> 1166K
代理商： INTEL386 SX
Intel386
TM
SX MICROPROCESSOR
Table 9-1. Instruction Set Clock Count Summary
(Continued)
CLOCK COUNT
NOTES
Real
Address
Mode or
Virtual
8086
Mode
Real
Address
Mode or
Virtual
8086
Mode
INSTRUCTION
FORMAT
Protected
Virtual
Address
Mode
Protected
Virtual
Address
Mode
CONTROL TRANSFER
(Continued)
Protected Mode Only (Direct Intersegment)
Via Call Gate to Same Privilege Level
Via Call Gate to Different Privilege Level,
(No Parameters)
Via Call Gate to Different Privilege Level,
(x Parameters)
From 286 Task to 286 TSS
From 286 Task to Intel386
TM
SX CPU TSS
From 286 Task to Virtual 8086 Task (Intel386 SX CPU TSS)
From Intel386 SX CPU Task to 286 TSS
From Intel386 SX CPU Task to Intel386 SX CPU TSS
From Intel386 SX CPU Task to Virtual 8086 Task (Intel386 SX CPU TSS)
64
a
m
h,j,k,r
98
a
m
h,j,k,r
106
a
8x
a
m
285
310
229
285
392
309
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
Indirect Intersegment
1 1 1 1 1 1 1 1 mod 0 1 1
r/m
30
a
m
46
a
m
b
h,j,k,r
Protected Mode Only (Indirect Intersegment)
Via Call Gate to Same Privilege Level
Via Call Gate to Different Privilege Level,
(No Parameters)
Via Call Gate to Different Privilege Level,
(x Parameters)
From 286 Task to 286 TSS
From 286 Task to Intel386 SX CPU TSS
From 286 Task to Virtual 8086 Task (Intel386 SX CPU TSS)
From Intel386 SX CPU Task to 286 TSS
From Intel386 SX CPU Task to Intel386 SX CPU TSS
From Intel386 SX CPU Task to Virtual 8086 Task (Intel386 SX CPU TSS)
JMP
e
Unconditional Jump
68
a
m
h,j,k,r
102
a
m
h,j,k,r
110
a
8x
a
m
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
399
Short
1 1 1 0 1 0 1 1 8-bit displacement
7
a
m
7
a
m
r
Direct within Segment
1 1 1 0 1 0 0 1
full displacement
7
a
m
7
a
m
r
within Segment
Register/Memory Indirect
1 1 1 1 1 1 1 1 mod 1 0 0
r/m
9
a
m/14
a
m
9
a
m/14
a
m
b
h,r
Direct Intersegment
1 1 1 0 1 0 1 0 unsigned full offset, selector
16
a
m
31
a
m
j,k,r
Protected Mode Only (Direct Intersegment)
Via Call Gate to Same Privilege Level
From 286 Task to 286 TSS
From 286 Task to Intel386 SX CPU TSS
From 286 Task to Virtual 8086 Task (Intel386 SX CPU TSS)
From Intel386 SX CPU Task to 286 TSS
From Intel386 SX CPU Task to Intel386 SX CPU TSS
From Intel386 SX CPU Task to Virtual 8086 Task (Intel386 SX CPU TSS)
53
a
m
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
395
Indirect Intersegment
1 1 1 1 1 1 1 1 mod 1 0 1
r/m
17
a
m
31
a
m
b
h,j,k,r
Protected Mode Only (Indirect Intersegment)
Via Call Gate to Same Privilege Level
From 286 Task to 286 TSS
From 286 Task to Intel386 SX CPU TSS
From 286 Task to Virtual 8086 Task (Intel386 SX CPU TSS)
From Intel386 SX CPU Task to 286 TSS
From Intel386 SX CPU Task to Intel386 SX CPU TSS
From Intel386 SX CPU Task to Virtual 8086 Task (Intel386 SX CPU TSS)
49
a
m
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
h,j,k,r
328
87
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