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參數(shù)資料
| 型號： | intel386 SX |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內部數(shù)據(jù)總線和24位內部地址總線32位微處理器) |
| 中文描述： | 32位16位外部數(shù)據(jù)總線和24位外部地址總線CPU（帶16位內部數(shù)據(jù)總線和24位內部地址總線32位微處理器） |
| 文件頁數(shù)： | 10/102頁 |
| 文件大?。?/td> | 1166K |
| 代理商： | INTEL386 SX |
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Intel386
TM
SX MICROPROCESSOR
Table 2.2. CR0 Definitions
Bit Position
Name
Function
0
PE
Protection mode enableDplaces the Intel386 SX Microprocessor
into protected mode. If PE is reset, the processor operates again
in Real Mode. PE may be set by loading MSW or CR0. PE can be
reset only by loading CR0, it cannot be reset by the LMSW
instruction.
1
MP
Monitor coprocessor extensionDallows WAIT instructions to
cause a processor extension not present exception (number 7).
2
EM
Emulate processor extensionDcauses a processor extension
not present exception (number 7) on ESC instructions to allow
emulating a processor extension.
3
TS
Task switchedDindicates the next instruction using a processor
extension will cause exception 7, allowing software to test
whether the current processor extension context belongs to the
current task.
31
PG
Paging enable bitDis set to enable the on-chip paging unit. It is
reset to disable the on-chip paging unit.
2.2 Instruction Set
The instruction set is divided into nine categories of
operations:
Data Transfer
Arithmetic
Shift/Rotate
String Manipulation
Bit Manipulation
Control Transfer
High Level Language Support
Operating System Support
Processor Control
These instructions are listed in Table 9.1
Instruc-
tion Set Clock Count Summary
.
All Intel386 SX Microprocessor instructions operate
on either 0, 1, 2 or 3 operands; an operand resides
in a register, in the instruction itself, or in memory.
Most zero operand instructions (e.g CLI, STI) take
only one byte. One operand instructions generally
are two bytes long. The average instruction is 3.2
bytes long. Since the Intel386 SX Microprocessor
has a 16 byte prefetch instruction queue, an average
of 5 instructions will be prefetched. The use of two
operands permits the following types of common in-
structions:
Register to Register
Memory to Register
Immediate to Register
Memory to Memory
Register to Memory
Immediate to Memory.
The operands can be either 8, 16, or 32 bits long. As
a general rule, when executing code written for the
Intel386 SX Microprocessor (32-bit code), operands
are 8 or 32 bits; when executing existing 8086 or
80286 code (16-bit code), operands are 8 or 16 bits.
Prefixes can be added to all instructions which over-
ride the default length of the operands (i.e. use
32-bit operands for 16-bit code, or 16-bit operands
for 32-bit code).
10
相關PDF資料 |
PDF描述 |
|---|---|
| INTEL386 | Intel386 EX Embedded Microprocessor |
| Intel387 dx | DX Math Coprocessor(32位數(shù)學協(xié)處理器) |
| Intel387 sx | SX Math Coprocessor(32位數(shù)學協(xié)處理器) |
| INTEL486 GX | Emedded Ultra-Low Power INTEL486 GX Processor(嵌入式超低能量處理器) |
| INTEL486 SX | Emedded Ultra-Low Power INTEL486 SX Processor(嵌入式超低能量處理器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| INTEL387 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR |
| INTEL387DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR |
| INTEL387SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR |
| INTEL387TMDX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR |
| INTEL740 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Graphics (GUI) Accelerator |
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