參數(shù)資料
型號： intel386 SX
廠商： Intel Corp.
英文描述： 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器)
中文描述： 32位16位外部數(shù)據(jù)總線和24位外部地址總線CPU（帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器）
文件頁數(shù)： 83/102頁
文件大?。?/td> 1166K
代理商： INTEL386 SX
Intel386
TM
SX MICROPROCESSOR
Table 9-1. Instruction Set Clock Count Summary
(Continued)
CLOCK COUNT
NOTES
Real
Address
Mode or
Virtual
8086
Mode
Real
Address
Mode or
Virtual
8086
Mode
INSTRUCTION
FORMAT
Protected
Virtual
Address
Mode
Protected
Virtual
Address
Mode
ARITHMETIC
(Continued)
Register from Memory
0 0 1 0 1 0 0 w mod reg
r/m
7
**
7
**
b
h
Memory from Register
0 0 1 0 1 0 1 w mod reg
r/m
6
*
6
*
b
h
Immediate from Register/Memory
1 0 0 0 0 0 s w mod 1 0 1
r/m immediate data
2/7
**
2/7
**
b
h
Immediate from Accumulator (short form)
0 0 1 0 1 1 0 w
immediate data
2
2
SBB
e
Subtract with Borrow
Register from Register
0 0 0 1 1 0 d w mod reg
r/m
2
2
Register from Memory
0 0 0 1 1 0 0 w mod reg
r/m
7
**
7
**
b
h
Memory from Register
0 0 0 1 1 0 1 w mod reg
r/m
6
*
6
*
b
h
Immediate from Register/Memory
1 0 0 0 0 0 s w mod 0 1 1
r/m immediate data
2/7
**
2/7
**
b
h
Immediate from Accumulator (short form)
0 0 0 1 1 1 0 w
immediate data
2
2
DEC
e
Decrement
Register/Memory
1 1 1 1 1 1 1 w reg 0 0 1
r/m
2/6
2/6
b
h
Register (short form)
0 1 0 0 1
reg
2
2
CMP
e
Compare
Register with Register
0 0 1 1 1 0 d w mod reg
r/m
2
2
Memory with Register
0 0 1 1 1 0 0 w mod reg
r/m
5
*
5
*
b
h
Register with Memory
0 0 1 1 1 0 1 w mod reg
r/m
6
*
6
*
b
h
Immediate with Register/Memory
1 0 0 0 0 0 s w mod 1 1 1
r/m immediate data
2/5
*
2/5
*
b
h
Immediate with Accumulator (short form)
0 0 1 1 1 1 0 w
immediate data
2
2
NEG
e
Change Sign
1 1 1 1 0 1 1 w mod 0 1 1
r/m
2/6
*
2/6
*
b
h
AAA
e
ASCII Adjust for Add
0 0 1 1 0 1 1 1
4
4
AAS
e
ASCII Adjust for Subtract
0 0 1 1 1 1 1 1
4
4
DAA
e
Decimal Adjust for Add
0 0 1 0 0 1 1 1
4
4
DAS
e
Decimal Adjust for Subtract
0 0 1 0 1 1 1 1
4
4
MUL
e
Multiply (unsigned)
Accumulator with Register/Memory
1 1 1 1 0 1 1 w mod 1 0 0
r/m
Multiplier-Byte
12–17/15–20
*
12–17/15–20
*
12–25/15–28
*
12–25/15–28
*
12–41/17–46
*
12–41/17–46
*
b, d
b, d
b, d
d, h
d, h
d, h
-Word
-Doubleword
IMUL
e
Integer Multiply (signed)
Accumulator with Register/Memory
1 1 1 1 0 1 1 w mod 1 0 1
r/m
Multiplier-Byte
12–17/15–20
*
12–17/15–20
*
12–25/15–28
*
12–25/15–28
*
12–41/17–46
*
12–41/17–46
*
b, d
b, d
b, d
d, h
d, h
d, h
-Word
-Doubleword
Register with Register/Memory
0 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1 mod reg
r/m
Multiplier-Byte
12–17/15–20
*
12–17/15–20
*
12–25/15–28
*
12–25/15–28
*
12–41/17–46
*
12–41/17–46
*
b, d
b, d
b, d
d, h
d, h
d, h
-Word
-Doubleword
Register/Memory with Immediate to Register
0 1 1 0 1 0 s 1 mod reg
r/m immediate data
-Word
-Doubleword
13–26
13–42
13–26/14–27
13–42/16–45
b, d
b, d
d, h
d, h
83
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