- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377495 > intel M80C186 (Intel Corp.) CHMOS High Integration 16-Bit Microprocessor(CHMOS 高集成16位微處理器) PDF資料下載
參數(shù)資料
| 型號： | intel M80C186 |
| 廠商： | Intel Corp. |
| 英文描述： | CHMOS High Integration 16-Bit Microprocessor(CHMOS 高集成16位微處理器) |
| 中文描述： | CHMOS高集成的16位微處理器（CHMOS高集成16位微處理器） |
| 文件頁數(shù)： | 3/59頁 |
| 文件大小： | 529K |
| 代理商： | INTEL M80C186 |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
M80C186
Table 1. M80C186 Pin Description
Symbol
PGA
QFP
Type
Name and Function
V
CC
, V
CC
V
SS
, V
SS
RESET
9, 43
1, 35
I
System Power:
a
5 volt power supply.
System Ground.
26, 60
52, 18
I
57
21
O
Reset Output indicates that the M80C186 CPU is being
reset, and can be used as a system reset. It is active HIGH,
synchronized with the processor clock, and lasts an integer
number of clock periods corresponding to the length of the
RES signal. Reset goes inactive 2 clockout periods after
RES goes inactive. When tied to the TEST/BUSY pin, Reset
forces the M80C186 into enhanced mode.
X1, X2
59, 58
19, 20
I
Crystal Inputs X1 and X2 provide external connections for a
fundamental mode or third overtone parallel resonant crystal
for the internal oscillator. X1 can connect to an external
clock instead of a crystal. In this case, minimize the
capacitance on X2 or drive X2 with complemented X1. The
input or oscillator frequency is internally divided by two to
generate the clock signal (CLKOUT).
CLKOUT
56
22
O
Clock Output provides the system with a 50% duty cycle
waveform. All device pin timings are specified relative to
CLKOUT. CLKOUT has sufficient MOS drive capabilities for
the Numeric Processor Extension.
RES
24
54
I
System Reset causes the M80C186 to immediately
terminate its present activity, clear the internal logic, and
enter a dormant state. This signal may be asynchronous to
the M80C186 clock. The M80C186 begins fetching
instructions approximately 7 clock cycles after RES is
returned HIGH. For proper initialization, V
CC
must be within
specifications and the clock signal must be stable for more
than 4 clocks with RES held LOW. RES is internally
synchronized. This input is provided with a Schmitt-trigger to
facilitate power-on RES generation via an RC network. When
RES occurs, the M80C186 will drive the status lines to an
inactive level for one clock, and then float them.
TEST/BUSY
47
31
I
The TEST pin is sampled during and after reset to determine
whether the M80C186 is to enter Compatible or Enhanced
Mode. Enhanced Mode requires TEST to be HIGH on the
rising edge of RES and LOW four clocks later. Any other
combination will place the M80C186 in Compatible Mode. A
weak internal pullup insures a HIGH state when the pin is not
driven.
TESTDIn Compatible Mode this pin is configured to operate
as TEST. This pin is examined by the WAIT instruction. If the
TEST input is HIGH when WAIT execution begins, instruction
execution will suspend. TEST will be resampled every five
clocks until it goes LOW, at which time execution will resume.
If interrupts are enabled while the M80C186 is waiting for
TEST, interrupts will be serviced.
BUSYDIn Enhanced Mode, this pin is configured to operate
as BUSY. The BUSY input is used to notify the M80C186 of
Numerics Processor Extension activity. Floating point
instructions executing in the M80C186 sample the BUSY pin
to determine when the Numerics Processor is ready to
accept a new command. BUSY is active HIGH.
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| intel Pentium CPU | 32 Bit CPU With MMX Technology and Mobile Module(32位帶MMX和移動(dòng)模塊處理器) |
| intel Pentium II processor | Pentium II Processor Mobile Module(帶移動(dòng)模塊奔II處理器) |
| INTEL386 CXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| INTEL386 CXSB | Low-Voltage, 32-Bit, Fully Static Embedded Microprocessor(低電壓32位完全靜態(tài)嵌入式微處理器) |
| intel386 DX | 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲(chǔ)管理) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEN I/O PCB | 制造商:Sliger Designs, Inc. 功能描述:I/O PCB - Bulk |
| INTEN LED PCB | 制造商:Sliger Designs, Inc. 功能描述:LED PCB - Bulk |
| INTEN-1-PROTO | 制造商:Sliger Designs, Inc. 功能描述:QUANTITY TWO PROTO TYPE SHEET METAL - Bulk |
| INTENSI-FI | 制造商:BOARDCOM 制造商全稱:Broadcom Corporation. 功能描述:DRAFT-802.11n PRODUCT FAMILY |
| INTER0.5 | 制造商:POWERDATA TECHNOLOGIES 功能描述:LEAD WIELAND TO WIELAND 0.5M |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。