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參數(shù)資料
| 型號(hào)： | intel i387 |
| 廠商： | Intel Corp. |
| 英文描述： | Military I387 Math Coprocessor(軍用I387數(shù)學(xué)協(xié)處理器) |
| 中文描述： | 軍事I387數(shù)學(xué)協(xié)處理器（軍用I387數(shù)學(xué)協(xié)處理器） |
| 文件頁數(shù)： | 8/41頁 |
| 文件大?。?/td> | 457K |
| 代理商： | INTEL I387 |
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MILITARY i387
TM
MATH COPROCESSOR
271074–3
ES is set if any unmasked exception bit is set; cleared otherwise.
See Table 2.2 for interpretation of condition code.
TOP values:
000
e
Register 0 is Top of Stack
001
e
Register 1 is Top of Stack
#
#
111
e
Register 7 is Top of Stack
For definitions of exceptions, refer to the section entitled
‘‘Exception Handling’’
Figure 2.2. i387
TM
NPX Status Word
2.3.3 STATUS WORD
The 16-bit status word (in the status register) shown
in Figure 2.2 reflects the overall state of the
M80387. It may be read and inspected by CPU code.
Bit 15, the B-bit (busy bit) is included for M8087
compatibility only. It reflects the contents of the ES
bit (bit 7 of the status word), not the status of the
BUSY output of i387/M80287 processors.
Bits 13–11 (TOP) point to the M80387 register that
is the current top-of-stack.
The four numeric condition code bits (C
3
–C
0
) are
similar to the flags in a CPU; instructions that per-
form arithmetic operations update these bits to re-
flect the outcome. The effects of these instructions
on the condition code are summarized in Tables 2.2
through 2.5.
Bit 7 is the error summary (ES) status bit. This bit is
set if any unmasked exception bit is set; it is clear
otherwise. If this bit is set, the ERROR signal is as-
serted.
Bit 6 is the stack flag (SF). This bit is used to distin-
guish invalid operations due to stack overflow or un-
derflow from other kinds of invalid operations. When
SF is set, bit 9 (C
1
) distinguishes between stack
overflow (C
1
e
1) and underflow (C
1
e
0).
Figure 2.2 shows the six exception flags in bits 5–0
of the status word. Bits 5–0 are set to indicate that
the i387 NPX has detected an exception while exe-
cuting an instruction. A later section entitled ‘‘Excep-
tion Handling’’ explains how they are set and used.
Note that when a new value is loaded into the status
word by the FLDENV or FRSTOR instruction, the
value of ES (bit 7) and its reflection in the B-bit (bit
15) are not derived from the values loaded from
memory but rather are dependent upon the values of
the exception flags (bits 5–0) in the status word and
their corresponding masks in the control word. If ES
is set in such a case, the ERROR output of the i387
NPX is activated immediately.
8
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