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參數(shù)資料
| 型號： | intel i387 |
| 廠商： | Intel Corp. |
| 英文描述： | Military I387 Math Coprocessor(軍用I387數(shù)學協(xié)處理器) |
| 中文描述： | 軍事I387數(shù)學協(xié)處理器（軍用I387數(shù)學協(xié)處理器） |
| 文件頁數(shù)： | 15/41頁 |
| 文件大?。?/td> | 457K |
| 代理商： | INTEL I387 |
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MILITARY i387
TM
MATH COPROCESSOR
2.7 M8087 and M80287 Compatibility
This section summarizes the differences between
the i387 NPX and the M80287. Any migration from
the M8087 directly to the i387 NPX must also take
into account the differences between the M8087
and the M80287 as listed in Appendix A.
Many changes have been designed into the i387
NPX to directly support the IEEE standard in hard-
ware. These changes result in increased perform-
ance by eliminating the need for software that sup-
ports the standard.
2.7.1 GENERAL DIFFERENCES
The i387 processor supports only affine closure for
infinity arithmetic, not projective closure. Bit 12 of
the Control Word (CW) no longer defines infinity
control. It is a reserved bit; but it is initialized to zero
after RESET or FINIT and is changeable upon load-
ing the CW. Programs must ignore this bit.
Operands for FSCALE and FPATAN are no longer
restricted in range (except for
g
%
); F2XM1 and
FPTAN accept a wider range of operands.
The results of transcendental operations may be
slightly different from those computed by M80287.
In the case of FPTAN, the i387 NPX supplies a true
tangent result in ST(1), and (always) a floating point
1 in ST.
Rounding control is in effect for FLD constant.
Software cannot change entries of the tag word to
values (other than empty) that do not reflect the ac-
tual register contents.
After reset, FINIT, and incomplete FPREM, the i387
NPX resets to zero the condition code bits C
3
–C
0
of
the status word.
In conformance with the IEEE standard, the i387
NPX does not support the special data formats:
pseudozero, pseudo-NaN, pseudoinfinity, and un-
normal.
Table 2.7. Exceptions
Exception
Cause
Default Action
(if exception is masked)
Invalid
Operation
Operation on a signaling NaN, unsupported format,
indeterminate form (0
*
%
, 0/0, (
a
%
)
a
(
b
%
), etc.), or
stack overflow/underflow (SF is also set).
Result is a quiet NaN, integer
indefinite, or BCD indefinite
Denormalized
Operand
At least one of the operands is denormalized, i.e. it has
the smallest exponent but a nonzero significand.
Normal processing
continues
Zero Divisor
The divisor is zero while the dividend is a noninfinite,
nonzero number.
Result is
%
Overflow
The result is too large in magnitude to fit in the specified
format.
Result is largest finite value
or
%
Underflow
The true result is nonzero but too small to be
represented in the specified format, and, if underflow
exception is masked, denormalization causes loss of
accuracy.
Result is denormalized or
zero
Inexact
Result
(Precision)
The true result is not exactly representable in the
specified format (e.g. 1/3); the result is rounded
according to the rounding mode.
Normal processing
continues
15
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