
MILITARY i387
TM
MATH COPROCESSOR
271074–4
Precision Control
00D24 bits (single precision)
01D(reserved)
10D53 bits (double precision)
11D64 bits (extended precision)
Rounding Control
00DRound to nearest or even
01DRound down (toward
b
%
)
10DRound up (toward
a
%
)
11DChop (truncate toward zero)
Figure 2.7. i387
TM
NPX Control Word
2.3.5 CONTROL WORD
The NPX provides several processing options that
are selected by loading a control word from memory
into the control register. Figure 2.7 shows the format
and encoding of fields in the control word.
The low-order byte of this control word configures
the i387 NPX error and exception masking. Bits 5–0
of the control word contain individual masks for each
of the six exceptions that the i387 processor recog-
nizes.
The high-order byte of the control word configures
the i387 NPX operating mode, including precision
and rounding.
#
Bit 12 no longer defines infinity control and is a
reserved bit. Only affine closure is supported for
infinity arithmetic. The bit is initialized to zero after
RESET or FINIT and is changeable upon loading
the CW. Programs must ignore this bit.
#
The rounding control (RC) bits (bits 11–10) pro-
vide for directed rounding and true chop, as well
as the unbiased round to nearest even mode
specified in the IEEE standard. Rounding control
affects only those instructions that perform
rounding at the end of the operation (and thus
can generate a precision exception); namely,
FST, FSTP, FIST, all arithmetic instructions (ex-
cept FPREM, FPREM1, FXTRACT, FABS, and
FCHS), and all transcendental instructions.
#
The precision control (PC) bits (bits 9–8) can be
used to set the i387 NPX internal operating preci-
sion of the significand at less than the default of
64 bits (extended precision). This can be useful in
providing compatibility with early generation arith-
metic processors of smaller precision. PC affects
only the instructions ADD, SUB, DIV, MUL, and
SQRT. For all other instructions, either the preci-
sion is determined by the opcode or extended
precision is used.
2.4 Interrupt Description
Several interrupts of the i386 processor are used to
report exceptional conditions while executing nu-
meric programs in either real or protected mode. Ta-
ble 2.6 shows these interrupts and their causes.
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