參數(shù)資料
型號(hào)： intel i387
廠商： Intel Corp.
英文描述： Military I387 Math Coprocessor(軍用I387數(shù)學(xué)協(xié)處理器)
中文描述： 軍事I387數(shù)學(xué)協(xié)處理器（軍用I387數(shù)學(xué)協(xié)處理器）
文件頁數(shù)： 5/41頁
文件大?。?/td> 457K
代理商： INTEL I387
MILITARY i387
TM
MATH COPROCESSOR
2.0 PROGRAMMING INTERFACE
The i387 coprocessor adds to an i386 processor
system additional data types, registers, instructions,
and interrupts specifically designed to facilitate high-
speed numerics processing. To use the i387 coproc-
essor requires no special programming tools, be-
cause all new instructions and data types are direct-
ly supported by the i386 microprocessor assembler
and
compilers
for
high-level
M8086/M8088 development tools that support the
M8087 can also be used to develop software for the
i386/i387 processors in real-address mode or virtu-
al-M8086 mode. All M80286 development tools that
support the M80287 can also be used to develop
software for the i386/i387 processors.
languages.
All
All communication between the i386 microprocessor
and the i387 NPX is transparent to applications soft-
ware. The CPU automatically controls the i387 NPX
whenever a numerics instruction is executed. All
physical memory and virtual memory of the CPU are
available for storage of the instructions and oper-
ands of programs that use the i387 NPX. All memory
addressing modes, including use of displacement,
base register, index register, and scaling, are avail-
able for addressing numerics operands.
Section 6 at the end of this data sheet lists by class
the instructions that the i387 NPX adds to the in-
struction set of an i386 microprocessor system.
2.1 Data Types
Table 2.1 lists the seven data types that the i387
NPX supports and presents the format for each type.
Operands are stored in memory with the least signifi-
cant digit at the lowest memory address. Programs
retrieve these values by generating the lowest ad-
dress. For maximum system performance, all oper-
ands should start at physical-memory addresses
evenly divisible by four (doubleword boundaries); op-
erands may begin at any other addresses, but will
require extra memory cycles to access the entire op-
erand.
Internally, the i387 coprocessor holds all numbers in
the extended-precision real format. Instructions that
load operands from memory automatically convert
operands represented in memory as 16-, 32-, or 64-
bit integers, 32- or 64-bit floating-point numbers, or
18-digit packed BCD numbers into extended-preci-
sion real format. Instructions that store operands in
memory perform the inverse type conversion.
2.2 Numeric Operands
A typical NPX instruction accepts one or two oper-
ands and produces a single result. In two-operand
instructions, one operand is the contents of an NPX
register, while the other may be a memory location.
The operands of some instructions are predefined;
for example FSQRT always takes the square root of
the number in the top stack element.
5
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