
IBM32NPCXX1EPABBE66
Preliminary
IBM Processor for Network Resources
pnr261_1intro.fm.06
August 14, 2000
System Environment
Page 5 of 706
Note:
Not all of these separate parts or steps described in this section are necessary for a dedicated function
system. PNR can easily be used in dedicated systems due to the goal of minimal processor intervention for
steady state operations.
1.7.1 Logical Channel Support
The Logical Channel is the unit of resource allocation in ATM. At one level, the End Station negotiates with
the Network Interface to determine the characteristics of each End-Station-to-End-Station connection. The
resources that may be reserved in the network are defined in the ATM UNI (User Network Interface) Specifi-
cation (see references in
Standards Compliance
on page 3). These resources include (but are not limited to)
the peak and average bandwidth to be used by the logical channel, the maximum burst length that may be
transmitted at the burst rate, the latency and variance of the connection, and the loss probability.
The term Logical Channel rather than virtual circuit or VPI/VCI is used in this databook to provide a level of
abstraction from these specific instances.
A Switched Virtual Circuit (SVC) can be negotiated with specific characteristics.
A virtual path can be negotiated with the network
.
Several virtual circuits within that path can then be multi-
plexed, using the VCI on that single VPI, without having to renegotiate for each additional VCI. The Logical
channel, with respect to the network, would be the Virtual Path. There would be multiple logical channels
internal to the End Station based on the Virtual Circuits used within the path.
All of these Logical Channels are dealt with uniformly in the PNR. A hierarchy of Logical Channel Descriptors
can be built up, and frames or buffers can be queued to each of the LCDs. See
3.12 Transmit Scheduler
(CSKED)
on page 243 for details.
1.7.2 Virtual Memory Support
The Packet Memory space appears on the bus as a group buffers whose size is configurable up to 128 KB).
A level of indirection has been added to the addressing of Packet memory to provide these large frame buff-
ers without requiring memory behind all of them at the same time. This has been done for a number of rea-
sons:
The frames on the network can be up to 64 KB long.
The receiver does not know how long a frame will be until it is completely received.
Software generally has a much easier time dealing with contiguous memory.
The memory does not page or swap. There are two major internal strategies for improving efficiency:
The first N bytes of memory in a buffer are referenced directly.
The blocks that make up the buffers are of multiple sizes.