
IBM32NPCXX1EPABBE66
IBM Processor for Network Resources
Preliminary
Page viii
pnr261TOC.fm.06
August 14, 2000
3.14.5 RXCRC ...............................................................................................................................326
3.14.5.1 RXCRC Functional Description ...................................................................................326
3.14.5.2 RXCRC Instruction Array Address Port .......................................................................326
3.14.5.3 RXCRC Instruction Array Read/Write Port ..................................................................327
3.14.5.4 RXCRC Processor State Selector ...............................................................................327
3.14.5.5 RXCRC Processor State Read/Write Port ...................................................................328
3.14.5.6 RXCRC Last LCD Index Register ................................................................................328
3.14.5.7 RXCRC Checksum Protocol Registers .......................................................................329
3.14.6 RXAAL ................................................................................................................................330
3.14.6.1 RXAAL Functional Description ....................................................................................330
3.14.6.2 RXAAL Instruction Array Address Port ........................................................................331
3.14.6.3 RXAAL Instruction Array Read/Write Port ...................................................................331
3.14.6.4 RXAAL Processor State Selector ................................................................................332
3.14.6.5 RXAAL Processor State Read/Write Port ....................................................................333
3.14.6.6 RXAAL Last LCD Index Register .................................................................................333
3.14.6.7 RXAAL Transmit Queue Length Compression Configuration .....................................334
3.14.6.8 RXAAL Packet Header Configuration ..........................................................................335
3.14.6.9 RXAAL Error Count Register .......................................................................................336
3.14.6.10 RXAAL Dropped Count Register ...............................................................................337
3.14.6.11 RXAAL Maximum SDU Length Register ...................................................................337
3.14.6.12 RXAAL OAM LCD Information Register ....................................................................338
3.14.6.13 RXAAL Scatter/Cut Through Info Registers ..............................................................338
3.14.6.14 RXAAL Scatter/Cut Through Flag Registers .............................................................342
3.14.7 RXLCD ................................................................................................................................343
3.14.7.1 RXLCD Functional Description ....................................................................................343
3.14.7.2 RXLCD Cache Data Array Address Port .....................................................................343
3.14.7.3 RXLCD Cache Data Array Read/Write Port ................................................................344
3.14.7.4 RXLCD Cache Line Info Registers ..............................................................................344
3.14.7.5 RXLCD Mode Register ................................................................................................345
3.14.8 RXRTO ...............................................................................................................................346
3.14.8.1 RXRTO Functional Description ...................................................................................346
3.14.8.2 Reassembly Timeout (RTO) Processing .....................................................................346
3.14.8.3 RXRTO LCD Update Data Registers ..........................................................................347
3.14.8.4 RXRTO LCD Update Mask Registers .........................................................................347
3.14.8.5 RXRTO LCD Update Op Registers .............................................................................348
3.14.8.6 RXRTO RTO LCD Table Bound Registers ..................................................................349
3.14.8.7 RXRTO Reassembly Timeout Value Register .............................................................349
3.14.8.8 RXRTO Reassembly Timeout Pre-Scaler Register .....................................................350
3.15 Receive Queues (RXQUE) .........................................................................................................351
3.15.1 Functional Description ........................................................................................................351
3.15.2 RXQUE Interface ................................................................................................................351
3.15.3 RXQUE Events ...................................................................................................................352
3.15.3.1 AAL5 Packet Events ....................................................................................................355
3.15.3.2 Cell Events ..................................................................................................................356
3.15.3.3 LC Events ....................................................................................................................357
3.15.3.4 ABR Events .................................................................................................................357
3.15.3.5 Miscellaneous Events ..................................................................................................358
3.15.3.6 Frame-Based Events ...................................................................................................360
3.15.3.7 PCORE Events ............................................................................................................360
3.15.3.8 System-Receive-Queue Events ..................................................................................360
3.15.3.9 RXAAL Picoprocessor Generated Events ...................................................................361