參數(shù)資料
型號: IBM25PPC970MP7TR21AFT
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 1600 MHz, RISC PROCESSOR, CBGA575
封裝: 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-575
文件頁數(shù): 66/74頁
文件大?。?/td> 845K
代理商: IBM25PPC970MP7TR21AFT
Datasheet
PowerPC 970MP RISC Microprocessor
Version 1.3
January 17, 2008
System Design Information
Page 69 of 74
TCK
1
In
JTAG: test clock that is separate from the system clock tree.
Controls all test access port functions.
TDI
1
In
JTAG: serial input used to feed test data and test access
port instructions.
TDO
1
Out
JTAG: serial output used to extract data from the chip under
test control.
TMS
1
In
JTAG: test mode select used to control the operation of the
JTAG state machine.
TRIGGEROUT
1
Out
Signal to indicate that internal trace collection has begun.
TRST
1
In
JTAG: asynchronous reset for the JTAG state machine.
Table 5-9. Input/Output Signal Descriptions (Page 4 of 4)
Pin Name
Width
In/Out
System/Debug Function
Notes
Notes:
1. Bus ratios 8:1 and 24:1 are not supported for processor input (PI) functionality.
2. Using the 4:1 or 12:1 ratio with a multiplier of 12 limits the use of power tuning to (frequency)/2.
3. The PLL_MULT can be overwritten by JTAG commands. See the PowerPC 970MP RISC Microprocessor Design Guide or the Pow-
erPC 970MP User’s Manual for more details.
4. OD = open drain. BiDi = bidirectional.
5. For a PowerPC 970MP, MASTERSEL must be controlled by the service processor to easily read the fuse string for each core. The
fuse string is not to be read during normal operation. During normal operation of a PowerPC 970MP, MASTERSEL must always be
set to low (including during the entire power-up sequence)
6. See Table 5-8 PowerPC 970MP Pins for Manufacturing Test Only on page 65.
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