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參數資料
| 型號： | IBM25PPC970MP7TR21AFT |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 1600 MHz, RISC PROCESSOR, CBGA575 |
| 封裝： | 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-575 |
| 文件頁數： | 16/74頁 |
| 文件大?。?/td> | 845K |
| 代理商： | IBM25PPC970MP7TR21AFT |
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Datasheet
PowerPC 970MP RISC Microprocessor
Version 1.3
January 17, 2008
Electrical and Thermal Characteristics
Page 23 of 74
3. Electrical and Thermal Characteristics
This section provides both alternating current (ac) and direct current (dc) electrical specifications and thermal
characteristics for the PowerPC 970MP.
3.1 dc Electrical Characteristics
The tables in this section describe the PowerPC 970MP dc electrical characteristics.
3.1.1 Absolute Maximum Ratings
Table 3-1. Absolute Maximum Ratings
Characteristic
Symbol
Value
Unit
Notes
Core supply voltages
V0, V1 (VDD)
-0.3 to 1.5
V
I/O supply voltage
V2 (OVDD)
-0.3 to 1.7
V
Phase-locked loop (PLL) supply voltage
AVDD
-0.3 to 3.0
V
Input voltage
VIN
-0.3 to 1.7
V
Storage temperature range
TSTG
-40 to 125
°C1
Note:
1. Table 3-3 on page 24 provides functional and tested operating conditions for OVDD, AVDD, and VIN. Table 3-7 on page 26 for pro-
vides functional and tested operating conditions V0 and V1. Absolute maximum ratings are stress ratings only, and functional
operation at the maximums is not guaranteed. Stresses beyond those listed above might affect device reliability or cause perma-
nent damage to the device.
2. Power supply ramping recommendations:
The order does not matter as long as the supplies reach their final destination in 2 s.
V0 cannot exceed OVDD by more than 0.8 V (Except for 2 s during power up or down, where it is allowed to be ≤ 1.55 V).
OVDD cannot exceed V0 by more than 0.8 V (Except for 2 s during power up or down, where it is allowed to be ≤ 1.5 V).
AVDD cannot exceed V0 by more than 2.5 V (Except for 2 s during power up or down, where it is allowed to be ≤.2.75 V).
The V1 circuitry is independent of V0, AVDD, and OVDD.
3. This is an implied dc voltage specification. Pending further evaluation, an allowance for ac overshoot or undershoot might be
accommodated beyond this input voltage specification.
Table 3-2. Maximum Allowable Current on Kelvin Probe Pins (DD1.1x)
Pin Name
Package Location
Maximum Current
CP0_KELV_GND0
W2
2.7 mA
CP1_KELV_GND1
W22
2.7 mA
CP0_KELV_V0
AB4
2.7 mA
CP1_KELV_V1
W21
2.7 mA
KELV_OVDD
A10
13 mA
KELV_GND2
B13
13 mA
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