參數(shù)資料
型號: GCIXP1250-232
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 67/148頁
文件大?。?/td> 1601K
代理商: GCIXP1250-232
Intel
IXP1250 Network Processor
Datasheet
67
3.9
Pullup/Pulldown and Unused Pin Guidelines
For normal (i.e., non-test mode) operation, terminate signals as follows:
Pullup these signals to VDDX: TMS, TDI.
TCK may be pulled up toVDDX or down to VSSX at the system designer
s option.
Pulldown these signals to VSS: SCAN_EN, TCK_BYP, TRST_L.
Pullup this signal to VDDX or pulldown to VSS; do not allow it to float: TSTCLK.
GPIO[3:1] and GPIO[0] are tri-stated during reset. If these signals are used to drive external
logic, pullup or pulldown as approprate to ensure valid logic levels during reset.
Terminate unused signals as follows:
Pullup these signals to VDDX: GNT_L[1], TK_IN, EOP32.
Pulldown these signals to VSS: NA/SACLK, FAST_RX1, FAST_RX2.
For shared IX Bus operation, it is recommended to pullup PORTCTL_L[3:0] and, additionally,
FPS[2:0] and TXAXIS at the designer
s discretion.
Typical pullup/pulldown resistor values are in the range of 5-10 KOhms.
Misc Test
TSTCLK
input
Misc Test
SCAN_EN
input
Processor
Support
PXTAL
input
Processor
Support
CINT_L
input
Processor
Support
RESET_IN_L
input
Processor
Support
RESET_OUT_L
output, low
Serial
RXD
input
Serial
TXD
output, high
IEEE 1149.1
TCK
input
IEEE 1149.1
TDI
input
IEEE 1149.1
TDO
output, undefined
IEEE 1149.1
TMS
input
IEEE 1149.1
TRST_L
input
Table 30. Pin State During Reset (Continued)
Function
Pin Name
Pin Reset State
Comment
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