參數(shù)資料
型號： GCIXP1250-232
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 21/148頁
文件大小： 1601K
代理商： GCIXP1250-232
Intel
IXP1250 Network Processor
Datasheet
21
2.5.6.3
BootROM Configurations
2.5.6.4
SRAM Bus Access Behavior
The SRAM controller within the IXP1250 will never initiate automatic bursting. Bursting is
controlled by the requestor (StrongARM* core or Microengine) depending on the type and
number of SRAM accesses needed.
Accesses are always longword 32-bit cycles on the SRAM Bus.
The IXP1250 always drives the address for each data cycle. No external address generation or
address advance control to SRAM devices is required.
Accesses from the StrongARM* core:
—
Byte, word, and longword accesses generated from the StrongARM* core are supported.
—
Bit operations are supported via StrongARM* core accesses to the SRAM Alias Address
Space to perform the same operations as a Microengine can accomplish implicitly in a
microinstruction (Push, Pop, Bit Test and Set, CAM operations, Lock/Unlock, etc.).
—
Bit, byte, and word writes result in Read-Modify-Write cycles.
—
Declare memory-mapped I/O as non-cacheable to prevent line fill burst cycles, and
disable caching and write buffering to ensure I/O device coherency.
—
For best performance, use longword accesses to avoid Read-Modify-Write cycles on the
SRAM Bus that occur with byte and word accesses.
Accesses from the Microengines:
Table 8. BootROM x32 Sample Configurations
Total Memory
Number of Chips
(Maximum of 8)
Size of Boot ROM
Device Organization
512 Kbytes
2
2 Mbit
128 K x 16-bit
2 Mbytes
8
2 Mbit
128 K x 16-bit
4 Mbytes
8
4 Mbit
256 K x 16-bit
6 Mbytes
6
8 Mbit
512 K x 16-bit
8 Mbytes
8
8 Mbit
512 K x 16-bit
Table 9. BootROM x16 Sample Configurations
Total Memory
Number of Chips
(Maximum of 8)
Size of Boot ROM
Device Organization
256 Kbytes
1
2 Mbit
128 K x 16-bit
512 Kbytes - 4 Mbytes
2 - 8
2 Mbit
128 K x 16-bit
512 Kbytes
1
4 Mbit
256 K x 16-bit
1 Mbytes - 4 Mbytes
2 - 8
4 Mbit
256 K x 16-bit
1 Mbytes
1
8 Mbit
512 K x 16-bit
2Mbytes - 4 Mbytes
2 - 4
8 Mbit
512 K x 16-bit
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