參數(shù)資料
型號(hào)： GCIXP1250-232
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 4/148頁
文件大?。?/td> 1601K
代理商： GCIXP1250-232
Intel
IXP1250 Network Processor
iv
Datasheet
3.8
3.9
Pin State During Reset........................................................................................65
Pullup/Pulldown and Unused Pin Guidelines......................................................67
4.0
Electrical Specifications ...................................................................................................68
4.1
Absolute Maximum Ratings ................................................................................68
4.2
DC Specifications................................................................................................71
4.2.1
Type 1 Driver DC Specifications ............................................................71
4.2.2
Type 2 Driver DC Specifications ............................................................72
4.2.3
Overshoot/Undershoot Specifications....................................................72
4.3
AC Specifications................................................................................................73
4.3.1
Clock Timing Specifications ...................................................................73
4.3.2
PXTAL Clock Input.................................................................................73
4.3.3
PXTAL Clock Oscillator Specifications...................................................74
4.3.4
PCI .........................................................................................................74
4.3.4.1 PCI Electrical Specification Conformance.................................74
4.3.4.2 PCI Clock Signal AC Parameter Measurements.......................74
4.3.4.3 PCI Bus Signals Timing.............................................................76
4.3.5
Reset......................................................................................................77
4.3.5.1 Reset Timings Specification......................................................77
4.3.6
IEEE 1149.1...........................................................................................78
4.3.6.1 IEEE 1149.1 Timing Specifications...........................................79
4.3.7
IX Bus.....................................................................................................81
4.3.7.1 FCLK Signal AC Parameter Measurements..............................81
4.3.7.2 IX Bus Signals Timing...............................................................82
4.3.7.3 IX Bus Protocol..........................................................................84
4.3.7.4 RDYBus...................................................................................118
4.3.7.5 TK_IN/TK_OUT.......................................................................120
4.3.8
SRAM Interface....................................................................................121
4.3.8.1 SRAM SCLK Signal AC Parameter Measurements................121
4.3.8.2 SRAM Bus Signal Timing........................................................122
4.3.8.3 SRAM Bus - SRAM Signal Protocol and Timing.....................124
4.3.8.4 SRAM Bus - BootROM and SlowPort Timings........................129
4.3.8.5 SRAM Bus - BootRom Signal Protocol and Timing.................129
4.3.8.6 SRAM Bus - Slow-Port Device Signal Protocol and Timing....132
4.3.9
SDRAM Interface .................................................................................136
4.3.9.1 SDCLK AC Parameter Measurements....................................136
4.3.9.2 SDRAM Bus Signal Timing .....................................................137
4.3.9.3 SDRAM Signal Protocol..........................................................138
4.4
Asynchronous Signal Timing Descriptions........................................................143
5.0
Mechanical Specifications..............................................................................................144
5.1
Package Dimensions ........................................................................................144
5.2
IXP1250 Package Dimensions (mm) ................................................................147
Figures
1
2
3
4
5
Silicon Block Diagram ...........................................................................................9
System Block Diagram........................................................................................10
SDRAM Unit Block Diagram ...............................................................................16
SRAM Unit Block Diagram..................................................................................19
Reset Logic.........................................................................................................24
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