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參數(shù)資料
| 型號： | CR16MHS9VJEE |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 16位微控制器 |
| 英文描述： | Family of CompactRISC 16-Bit Microcontrollers |
| 中文描述： | 家庭CompactRISC 16位微控制器 |
| 文件頁數(shù)： | 33/99頁 |
| 文件大?。?/td> | 449K |
| 代理商： | CR16MHS9VJEE |
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terrupt nesting levels. However, the interrupt stack must not
be allowed to overflow its allocated memory space.
Unless specifically enabled by the software, nested inter-
rupts will not occur. When the CPU acknowledges an inter-
rupt, the I bit in the PSR register is automatically cleared to 0
for the duration of the service routine, disabling any further
maskable interrupts.
To allow nested interrupts, an interrupt service routine should
first set or clear the respective interrupt enable bits to specify
which peripherals will be allowed to interrupt the current ser-
vice routine. The present interrupt routine should be disabled
(or interrupt pending bit cleared). The service routine should
then set the PSR.I bit to 1, thus enabling maskable interrupts.
This bit can be controlled with the Store Processor Register
(SPR) and Load Processor Register (LPR) instructions.
Note:
Clearing the pending bit of the current interrupt should
not be immediately followed by enabling further interrupts by
setting the I bit in the PSR register. Wait states must be in-
serted into the software after clearing the interrupt pending
bit and before another interrupt. Placing a NOP instruction
will perform this instruction. This is because the instruction
which resets the pending bit may not yet be finished when the
interrupts are already enabled again by setting the I bit in the
PSR register. To avoid this situation the user has to make
sure that prior to enabling the interrupt an additional instruc-
tion is inserted. This could look like the example below:
SBITi
$0, T1ICRL
NOP
MOVW
$0x0a00, r0
LPR
r0, psr
A CBITi or SBITi instruction may be used to clear the interrupt
pending bit. In such cases, a spurious interrupt may occur.
# clear pending bit
# NOP instruction
# enable further interrupts
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CR16MHS9VJEI | Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS5 | Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS544VC | Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS544VI | Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS9 | Family of CompactRISC 16-Bit Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16MHS9VJEI | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS5 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of CompactRISC 16-Bit Microcontrollers |
| CR16MNS544V8Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16MNS544V9Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16MNS544VC | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of CompactRISC 16-Bit Microcontrollers |
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