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Each interrupt or trap source has an associated vector num-
ber ranging from 0 to 31, as indicated in Table10. When an
interrupt occurs, the hardware multiplies the vector by 2,
adds the result to the contents of the INTBASE register, and
uses the resulting address to obtain the service routine start-
ing address from the corresponding entry in the Dispatch Ta-
ble. This address is placed in the Program Counter so that
the CPU begins executing the interrupt service routine.
Figure3 summarizes the method used by the device to gen-
erate the starting address of a service routine.
9.1.3
When an interrupt occurs, the CPU automatically preserves
the contents of the Program Counter (PC) and Processor
Status Register (PSR) by pushing them on the interrupt stack
and decrementing the Interrupt Stack Pointer by four. The
service routine ends with a Return from Exception (RETX) in-
struction, which returns control to the interrupted program by
restoring the PC and PSR values and incrementing the Inter-
rupt Stack Pointer (ISP) by four.
Prior to using any interrupts, the Interrupt Stack Pointer (ISP)
must be initialized so that it points to a space in RAM where
the interrupt stack will be kept. The stack grows downward in
Stack Usage
memory (toward address zero) when an interrupt occurs and
items are pushed onto the stack. The stack shrinks upward
in memory when an interrupt service routine ends and items
are popped from the stack.
Many routines need to use the general-purpose registers R0
through R13. To preserve the existing register contents, a
routine can save register contents on the program stack
upon start of the routine and restore the register contents pri-
or to completion of the routine. The software can also use the
program stack to transfer data parameters from one routine
to another when the parameters are too large to easily fit into
the scratch registers (large structures, large arrays, or a set
of more than four parameters in a single routine). A high-level
language typically allocates the local (non-static) variables
on the stack.
The stack pointer for the program stack is the SP register,
which must be initialized prior to any register save/restore
operations or data transfer operations. Using the program
stack, an interrupt routine needs to initially save the contests
of all registers that it uses, and restore those register con-
tents before returning to the interrupted program.
9.2
NON-MASKABLE INTERRUPT
A non-maskable interrupt is triggered by a falling edge on the
NMI input pin, which generates a software trap. The NMI pin
is an asynchronous input with Schmitt trigger characteristics
and an internal synchronization circuit. Therefore, no exter-
nal synchronizing is needed.
Upon reset, the non-maskable interrupt is disabled and
should remain disabled until the software initializes the inter-
rupt table, interrupt base, and interrupt stack pointer. It can
Figure 3.
INTBASE
~
~
~
~
Non-maskable Interrupt
Reserved
Supervisor Call Trap
Divide By Zero Trap
Flag Trap
Breakpoint Trap
Trace Trap
Undefined Instruction Trap
Maskable Interrupts
NMI
Reserved
Reserved
SVC
DVZ
FLG
BPT
TRC
UND
Reserved
Reserved
ISE
INTn
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 to 127
In-System Emulator Interrupt
31
0
Reserved
Reserved
DBG
Debug Trap