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參數(shù)資料
| 型號(hào)： | BT849A |
| 英文描述： | Single-Chip Video Capture for PCI |
| 中文描述： | 單芯片的PCI視頻捕捉 |
| 文件頁(yè)數(shù)： | 87/141頁(yè) |
| 文件大?。?/td> | 1149K |
| 代理商： | BT849A |
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Brooktree
77
E
LECTRICAL
I
NTERFACES
JTAG Interface
L848A_A
Bt848/848A/849A
Single-Chip Video Capture for PCI
JTAG Interface
Need for Functional
Verification
As the complexity of imaging chips increases, the need to easily access individual
chips for functional verification is becoming vital. The Bt848 has incorporated
special circuitry that allows it to be accessed in full compliance with standards set
by the Joint Test Action Group (JTAG). Conforming to IEEE P1149.1 “Standard
Test Access Port and Boundary Scan Architecture,” the Bt848 has dedicated pins
that are used for testability purposes only.
JTAG Approach to
Testability
JTAG’s approach to testability utilizes boundary scan cells placed at each digital
pin and digital interface (a digital interface is the boundary between an analog
block and a digital block within the Bt848). All cells are interconnected into a
boundary scan register that applies or captures test data to be used for functional
verification of the integrated circuit. JTAG is particularly useful for board testers
using functional testing methods.
JTAG consists of five dedicated pins comprising the Test Access Port (TAP).
These pins are Test Mode Select (TMS), Test Clock (TCK), Test Data Input (TDI),
Test Data Out (TDO) and Test Reset (TRST). The TRST pin will reset the JTAG
controller when pulled low at any time. Verification of the integrated circuit and its
connection to other modules on the printed circuit board can be achieved through
these five TAP pins. With boundary scan cells at each digital interface and pin, the
Bt848 has the capability to apply and capture the respective logic levels. Since all
of the digital pins are interconnected as a long shift register, the TAP logic has ac-
cess and control of all the necessary pins to verify functionality. The TAP control-
ler can shift in any number of test vectors through the TDI input and apply them to
the internal circuitry. The output result is scanned out on the TDO pin and exter-
nally checked. While isolating the Bt848 from other components on the board, the
user has easy access to all Bt848 digital pins and digital interfaces through the TAP
and can perform complete functionality tests without using expensive bed-of-nails
testers.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BT849AKPF | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single-Chip Video Capture for PCI |
| BT850-SA | 功能描述:BTV4.2 DUAL MODE USB HCI MODULE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
| BT850-SA-T/R | 功能描述:BTV4.2 DUAL MODE USB HCI MODULE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:2,500 |
| BT850-ST | 功能描述:BTV4.2 DUAL MODE USB HCI MODULE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
| BT850-ST-T/R | 功能描述:BTV4.2 DUAL MODE USB HCI MODULEE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:2,500 |
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