參數(shù)資料
型號: BT849A
英文描述: Single-Chip Video Capture for PCI
中文描述: 單芯片的PCI視頻捕捉
文件頁數(shù): 123/141頁
文件大?。?/td> 1149K
代理商: BT849A
Brooktree
113
C
ONTROL
R
EGISTER
D
EFINITIONS
Interrupt Status
L848A_A
Bt848/848A/849A
Single-Chip Video Capture for PCI
[11]
RR
0
RISCI
Set when the IRQ bit in the RISC instruction is set.
[10]
RO
0
Reserved
[9]
RR
0
GPINT
Set upon the programmable edge or level of the GPINTR pin.
[8]
RR
0
I2CDONE
Set when an I
2
C read or write operation has completed.
[7:6]
RO
0
Reserved
[5]
RR
0
VPRES
Set when the analog video signal input changes from present to
absent or vice versa.
[4]
RR
0
HLOCK
Set if the horizontal lock condition changes on incoming video.
[3]
RR
0
OFLOW
Set when an overflow is detected in the luma or chroma ADCs.
[2]
RR
0
HSYNC
Set when the analog input begins a new video line, or at the GPIO
HRESET leading edge.
[1]
RR
0
VSYNC
Set when FIELD changes on the analog input or GPIO input.
[0]
RR
0
FMTCHG
Set when a video format change is detected, i.e. the analog input
changes from NTSC to PAL or vice versa.
Bits
Type
Default
Name
Description
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