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| 型號(hào)： | BT849A |
| 英文描述： | Single-Chip Video Capture for PCI |
| 中文描述： | 單芯片的PCI視頻捕捉 |
| 文件頁(yè)數(shù)： | 79/141頁(yè) |
| 文件大?。?/td> | 1149K |
| 代理商： | BT849A |
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Brooktree
69
E
LECTRICAL
I
NTERFACES
General Purpose I/O Port
L848A_A
Bt848/848A/849A
Single-Chip Video Capture for PCI
GPIO Normal Mode
In the GPIO normal mode, each of the general purpose I/O pins can be pro-
grammed individually. An internal register (GPOE) can be programmed to enable
the output buffers of the pins selected as outputs. The contents of the GPDATA reg-
ister are put on the enabled GPIO output pins. In the case where the GPIO pins are
used as general purpose input pins, the contents of the GPIO data register are ig-
nored and the signals on the GPIO bus pins are read through a separate register.
The GPIO normal mode allows PCI burst transfers by providing a 64-DWORD
contiguous address space. This allows the PCI bus to burst 64 DWORDs without
having to resend the address for each DWORD. The 32-bit PCI DWORD is trun-
cated and only the lower 24 bits are output over the GPIO port. This in effect pro-
vides a high speed output bus interface for non-PCI external devices.
GPIO SPI Modes
In the SPI input and output modes, the GPIO pins are mapped as shown in
Table 13. Note that the GPIO signal names correspond to those of a stand-alone
video decoder such as the Bt819A or Bt829. A separate clock pin (GPCLK) is used
for the clock signal. In the SPI input mode, the GPCLK signal is used to input an
external clock signal. In the SPI output mode, the GPCLK signal is used to output
the Bt848’s CLKx1 (4*Fsc). Figure 33 and Figure 32 show the basic timing rela-
tionships for the SPI output mode. In the SPI input mode, it is assumed that a video
decoder similar to the Bt819A or Bt829 is connected to the GPIO port.
The YCrCb 4:2:2 pixel stream follows the CCIR recommendation when the
RANGE bit in the Output Format register is set to a logical zero. CCIR 601 spec-
ifies that nominal video will have Y values ranging from 16 to 235, and the Cr and
Cb values will range from 16 to 240. However, excursions outside this range are al-
lowed to handle non-standard video. The only mandatory requirement is that 0 and
255 be reserved for timing information.
Figure 31. GPIO SPI Output Mode
Video
Decoder
Scaler
Video Data
Format Converter
FIFO
DMA Controller
and PCI Initiator
Local Registers
External
Circuitry
GPIO Port
Bt848 Video Decoder Output
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相關(guān)代理商/技術(shù)參數(shù) |
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| BT849AKPF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip Video Capture for PCI |
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| BT850-SA-T/R | 功能描述:BTV4.2 DUAL MODE USB HCI MODULE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:2,500 |
| BT850-ST | 功能描述:BTV4.2 DUAL MODE USB HCI MODULE 制造商:laird - wireless & thermal systems 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
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