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參數(shù)資料
| 型號(hào)： | AM8530H |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Serial Communications Controller |
| 中文描述： | 串行通信控制器 |
| 文件頁(yè)數(shù)： | 21/194頁(yè) |
| 文件大?。?/td> | 797K |
| 代理商： | AM8530H |
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2–3
S ystem Interfac e
CHAPTER 2
2.1
The SCC internal structure provides all the interrupt and control logic necessary to inter-
face with non-multiplexed buses. Interface logic is also provided to monitor modem or
peripheral control inputs or outputs. All of the control signals are general-purpose and can
be applied to various peripheral devices as well as used for modem control.
INT RODUCT ION
The center for data activity revolves around the internal read and write registers. The pro-
gramming of these registers provides the SCC with functional “personality;” i.e. register
values can be assigned before or during program sequencing to determine how the SCC
will establish a given communication protocol.
This chapter covers the details of interfacing the SCC to a system. The general timing
requirements are described but the respective data sheets must be referred to for specific
A.C. numbers.
2.2
All modes of communication are established by the bit values of the write registers. As
data are received or transmitted, read register values may change. These changed val-
ues can promote software action or internal hardware action for further register changes.
REGIS T ERS
The register set for each channel includes several write and read registers. Ten write reg-
isters are used for control, two for sync character generation, and two for the on-chip
baud rate generator. Two additional write registers are shared by both channels; one is
used as the interrupt vector and one as the master interrupt control. Both registers are
accessed and shared by either channel.
Six read registers indicate status functions; two are used by the baud rate generator, and
one by the receiver buffer. The remaining two read registers are shared by both channels;
one for interrupt pending bits and one for the interrupt vector. On the Am85C30 three ad-
ditional registers are available. Refer to Chapter 4 and Chapter 6 for further details on
these registers.
Table 2–1 summarizes the assigned functions for each read and write register. Chapter 6
provides a detailed bit legend and description of each register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM85C30-10PC | Enhanced Serial Communications Controller |
| Am85C30 | Serial Communications Controller |
| AM85C30 | Enhanced Serial Communications Controller |
| AM85C30-8PC | Enhanced Serial Communications Controller |
| AM85C30-16JC | Enhanced Serial Communications Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM8530H/AM85C301992 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am8530H/Am85C30 1992 - Am8530H/Am85C30 Serial Communications Controller |
| AM8530H-4DC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530H-4DCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| AM8530H-4JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
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