參數(shù)資料
型號(hào)： ADUC834
廠商： Analog Devices, Inc.
英文描述： MicroConverter, Dual 16-/24- Bit ADCs with Embedded 62KB FLASH MCU
中文描述： MicroConverter的，雙與嵌入62KB閃存MCU 16-/24-位ADC
文件頁(yè)數(shù)： 62/72頁(yè)
文件大?。?/td> 1451K
代理商： ADUC834
(12 March 2002) REV.
P
rC
ADuC834
–
62
–
PRELIMINARY TECHNICAL DATA
BAUD RAT E GE NE RAT ION USING T IME R 1 AND T IME R 2
T imer 1 Generated Baud Rates
When T imer 1 is used as the baud rate generator, the baud
rates in Modes 1 and 3 are determined by the T imer 1 overflow
rate and the value of SMOD as follows:
Modes 1 and 3 Baud Rate =
(2
SMOD
/32)
×
(T imer 1 Overflow Rate)
T he T imer 1 interrupt should be disabled in this application.
T he T imer itself can be configured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is configured for timer operation, in the
autoreload mode (high nibble of T MOD = 0100Binary). In that
case, the baud rate is given by the formula:
Modes 1 and 3 Baud Rate =
(2
SMOD
/32)
×
(Core Clock/(12
×
[256-T H1]))
A very low baud rate can also be achieved with T imer 1 by leaving
the T imer 1 interrupt enabled, and configuring the timer to run
as a 16-bit timer (high nibble of T MOD = 0100Binary), and
using the T imer 1 interrupt to do a 16-bit software reload. T able
X X X I below, shows some commonly-used baud rates and
how they might be calculated from a core clock frequency of
1.5728 MHz and 12.58 MHz using timer 1. Generally speak-
ing, a 5% error is tolerable using asynchronous (start/stop)
communications.
T able X X X I. Commonly-Used Baud Rates, T imer 1
Ideal
Baud
Core
CLK
SMOD
Value
T H1-Reload
Value
Actual
Baud
%
E rror
9600
1600
1200
1200
12.58
12.58
12.58
1.57
1
1
1
1
–
7 (F9h)
–
27 (E5h)
–
55 (C9h)
–
7 (F9h)
9362
1627
1192
1170
2.5
1.1
0.7
2.5
T imer 2 Generated Baud Rates
Baud rates can also be generated using T imer 2. Using T imer 2
is similar to using T imer 1 in that the timer must overflow 16 times
before a bit is transmitted/received. Because T imer 2 has a 16-bit
autoreload mode a wider range of baud rates is possible using
T imer 2.
Modes 1 and 3 Baud Rate = (1/16)
×
(T imer 2 Overflow Rate)
T herefore, when T imer 2 is used to generate baud rates, the timer
increments every two clock cycles and not every core machine
cycle as before. Hence, it increments six times faster than T imer
1, and therefore baud rates six times faster are possible. Because
T imer 2 has 16-bit autoreload capability, very low baud rates
are still possible.
T imer 2 is selected as the baud rate generator by setting the T CLK
and/or RCLK in T 2CON. T he baud rates for transmit and receive
can be simultaneously different. Setting RCLK and/or T CLK puts
T imer 2 into its baud rate generator mode as shown in Figure 52.
In this case, the baud rate is given by the formula:
Modes 1 and 3 Baud Rate
= (Core Clk)/(32
×
[65536
–
(RCAP2H, RCAP2L)])
T able X X X II shows some commonly used baud rates and how they
might be calculated from a core clock frequency of 1.5728 MHz
and 12.5829 MHz using timer 2.
T able X X X II. Commonly used Baud Rates, T imer 2
Ideal
Baud
Core
CLK
RCAP2H
Value
RCAP2L
Value
Actual
Baud
%
E rror
19200
9600
1600
1200
9600
1600
1200
12.58
12.58
12.58
12.58
1.57
1.57
1.57
–
1 (FFh)
–
1 (FFh)
–
1 (FFh)
–
2 (FEh)
–
1 (FFh)
–
1 (FFh)
–
1 (FFh)
–
20 (ECh)
–
41 (D7h)
–
164 (5Ch)
–
72 (B8h)
–
5 (FBh)
–
20 (ECh)
–
41 (D7h)
19661
9591
2398
1199
9830
1658
1199
2.4
0.1
0.1
0.1
2.4
2.4
0.1
CORE
CLK
*
2
T2
PIN
TR2
CONTROL
TL2
(8-BITS)
TH2
(8-BITS)
RELOAD
EXEN2
CONTROL
T2EX
PIN
RCAP2L
RCAP2H
NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12.
TIMER 2
OVERFLOW
2
16
16
RCLK
TCLK
RX
CLOCK
TX
CLOCK
0
0
1
1
1
0
SMOD
TIMER 1
OVERFLOW
TRANSITION
DETECTOR
EXF
2
TIMER 2
INTERRUPT
NOTE AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
C/
T 2
= 0
C/
T 2
= 1
*
THE CORE CLOCK IS THE OUTPUT OF THE PLL AS DESCRIBED ON PAGE 46
Figure 52. Timer 2, UART Baud Rates
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