參數(shù)資料
型號(hào): ADUC834
廠商: Analog Devices, Inc.
英文描述: MicroConverter, Dual 16-/24- Bit ADCs with Embedded 62KB FLASH MCU
中文描述: MicroConverter的,雙與嵌入62KB閃存MCU 16-/24-位ADC
文件頁數(shù): 19/72頁
文件大?。?/td> 1451K
代理商: ADUC834
REV.
P
rC (12 March 2002)
ADuC834
19
PRELIMINARY TECHNICAL DATA
Pin No.
Mnemonic
T ype
*
Description
3-4, 9-12
P1.2-P1.7
I
Port 1.2 to Port 1.7 have no digital output driver; they can function as a digital
input for which ‘0’ must be written to the port bit. As a digital input, these pins
must be driven high or low externally.
T hese pins also have the following analog functionality:
T he voltage output from the DAC or one or both current sources (200 μA or 2 x
200 μA) can be configured to appear at this pin.
Auxiliary ADC Input or one or both current sources can be configured at this pin.
Primary ADC, Positive Analog Input
Primary ADC, Negative Analog Input
Auxiliary ADC Input or muxed Primary ADC, Positive Analog Input
Auxiliary ADC Input or muxed Primary ADC, Negative Analog Input. T he voltage
output from the DAC can also be configured to appear at this pin.
P1.2/DAC/IEX C1
I/O
P1.3/AIN5/IEX C2
P1.4/AIN1
P1.5/AIN2
P1.6/AIN3
P1.7/AIN4/DAC
I/O
I
I
I
I/O
5
6
AV
DD
AGND
S
S
Analog Supply Voltage, 3 V or 5 V
Analog Ground. Ground reference pin for the analog circuitry.
7
8
REFIN(–)
REFIN(+)
I
I
Reference input, negative terminal.
Reference input, positive terminal.
13
14
SS
MISO
I
I/O
Slave Select Input for the SPI Interface. A weak pull-up is present on this pin.
Master Input/Slave Output for the SPI Interface. T here is a weak pull-up on this
input pin.
15
RESET
I
Reset Input. A high level on this pin for 16 core clock cycles while the oscillator is
running resets the device. T here is an internal weak pull-down and a Schmitt
trigger input stage on this pin.
16–19,
22-25
P3.0–P3.7
I/O
P3.0–P3.7 are bidirectional port pins with internal pull-up resistors. Port 3 pins
that have 1s written to them are pulled high by the internal pull-up resistors, and
in that state can be used as inputs. As inputs, Port 3 pins being pulled externally
low will source current because of the internal pull-up resistors. When driving a
0-to-1 output transition, a strong pull-up is active for two core clock periods of
the instruction cycle.
Port 3 pins also have various secondary functions described below.
Receiver Data for UART serial Port
T ransmitter Data for UART serial Port
External Interrupt 0. T his pin can also be used as a gate control input to T imer0.
External Interrupt 1. T his pin can also be used as a gate control input to T imer1.
T imer/Counter 0 External Input
T imer/Counter 1 External Input
External Data Memory Write Strobe. Latches the data byte from Port 0 into an
external data memory.
External Data Memory Read Strobe. Enables the data from an external data
memory to Port 0.
P3.0/RX D
P3.1/T X D
P3.2/
INT 0
P3.3/
INT 1
P3.4/T 0
P3.5/T 1
P3.6/
WR
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P3.7/
RD
I/O
20, 34, 48
21, 35, 47
DV
DD
DGND
S
S
Digital supply, 3 V or 5 V.
Digital ground, ground reference point for the digital circuitry.
26
SCLOCK /D0
I/O
Serial interface clock for the SPI interface. As an input this pin is a Schmitt
triggered input and a weak internal pull-up is present on this pin unless it is
outputting logic low.
T his pin can also be controlled directly in software as a digital output pin.
Serial master output/slave input data for the SPI interface. A weak internal
pull-up is present on this pin unless it is outputting logic low.
T his pin can also be controlled directly in software as a digital output pin.
27
MOSI/D1
I/O
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