
(12 March 2002) REV.
P
rC
ADuC834
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34
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PRELIMINARY TECHNICAL DATA
input signal conditioning; it simply changes the data output cod-
ing and the points on the transfer function where calibrations
occur. When an ADC is configured for unipolar operation,
the output coding is natural (straight) binary with a zero
differential input voltage resulting in a code of 000 . . . 000, a
midscale voltage resulting in a code of 100 . . . 000, and a full-
scale input voltage resulting in a code of 111 . . . 111. When an
ADC is configured for bipolar operation, the coding is offset
binary with a negative full-scale voltage resulting in a code of
000 . . . 000, a zero differential voltage resulting in a code of
100 . . . 000, and a positive full-scale voltage resulting in a code
of 111 . . . 111.
Reference Input
T he ADuC834’s reference inputs, REFIN(+) and REFIN(–),
provide a differential reference input capability. T he com-
mon-mode range for these differential inputs is from AGND to
AVDD. T he nominal reference voltage, VREF (REFIN(+) –
REFIN(–)), for specified operation is 2.5 V with the pri-
mary and auxiliary reference enable bits set in the
respective ADC 0C ON and/or ADC1CON SFRs.
T he part is also functional (although not specified for per-
formance) when the X REF0 or X REF1 bits are ‘0,’ which
enables the on-chip internal bandgap reference. In this mode,
the ADCs will see the internal reference of 1.25 V, therefore
halving all input ranges. As a result of using the internal
reference voltage, a noticeable degradation in peak-to-peak
resolution will result. T herefore, for best performance, opera-
tion with an external reference is strongly recommended.
In applications where the excitation (voltage or current) for the
transducer on the analog input also drives the reference voltage
for the part, the effect of the low-frequency noise in the excita-
tion source will be removed as the application is ratiometric. If
the ADuC834 is not used in a ratiometric application, a low
noise reference should be used. Recommended reference voltage
sources for the ADuC834 include the AD780, REF43, and
REF192.
It should also be noted that the reference inputs provide a
high impedance, dynamic load. Because the input impedance
of each reference input is dynamic, resistor/capacitor combi-
nations on these inputs can cause dc gain errors depending
on the output impedance of the source that is driving the
reference inputs. Reference voltage sources, like those recom-
mended above (e.g., AD780) will typically have low output
impedances and therefore decoupling capacitors on the
REFIN(+) input would be recommended. Deriving the refer-
ence input voltage across an external resistor, as shown in
Figure 60, will mean that the reference input sees a signifi-
cant external source impedance. External decoupling on the
REFIN(+) and REFIN(-) pins would not be recommended
in this type of circuit configuration.
Burnout C urrents
T he primary ADC on the ADuC834 contains two 100 nA
constant current generators, one sourcing current from
AVDD to AIN(+), and one sinking from AIN(–) to AGND.
T he currents are switched to the selected analog input pair. Both
currents are either on or off, depending on the Burnout C ur-
rent Enable (BO) bit in the ICON SFR (see T able IX ). T hese
currents can be used to verify that an external transducer is still
operational before attempting to take measurements on that
channel. Once the burnout currents are turned on, they will
flow in the external transducer circuit, and a measurement of
the input voltage on the analog input channel can be taken. If
the resultant voltage measured is full-scale, this indicates that
the transducer has gone open-circuit. If the voltage measured is
0 V, it indicates that the transducer has short circuited. For
normal operation, these burnout currents are turned off by
writing a 0 to the BO bit in the ICON SFR. T he current
sources work over the normal absolute input voltage range speci-
fications.
E xcitation C urrents
T he ADuC 834 also contains two identical, 200 μA constant
current sources. Both source current from AVDD to Pin
#3 (IEX C1) or Pin #4 (IEX C2) T hese current sources are
controlled via bits in the ICON SFR shown in T able IX . T hey
can be configured to source 200 μA individually to both pins
or a combination of both currents, i.e., 400 μA to either of
the selected pins. T hese current sources can be used to excite
external resistive bridge or RT D sensors.
Reference Detect
T he ADuC834 includes on-chip circuitry to detect if the part has
a valid reference for conversions or calibrations. If the
voltage between the external REFIN(+) and REFIN(–) pins
goes below 0.3 V or either the REFIN(+) or REFIN(–) inputs is
open circuit, the ADuC834 detects that it no longer has a
valid reference. In this case, the NOX REF bit of the
ADCST AT SFR is set to a 1. If the ADuC834 is performing
normal conversions and the NOX REF bit becomes active, the
conversion results revert to all 1s. T herefore, it is not necessary
to continuously monitor the status of the NOX REF bit when
performing conversions. It is only necessary to verify its status if
the conversion result read from the ADC Data Register is all 1s.
If the ADuC834 is performing either an offset or gain calibra-
tion and the NOX REF bit becomes active, the updating of the
respective calibration registers is inhibited to avoid loading
incorrect coefficients to these registers, and the appropriate
ERR0 or ERR1 bits in the ADC ST AT SFR are set. If the
user is concerned about verifying that a valid reference is in
place every time a calibration is performed, the status of the
ERR0 or ERR1 bit should be checked at the end of the calibra-
tion cycle.
Sigma-Delta Modulator
A sigma-delta ADC generally consists of two main blocks,
an analog modulator and a digital filter. In the case of the
ADuC834 ADCs, the analog modulators consist of a differ-
ence amplifier, an integrator block, a comparator, and a
feedback DAC as illustrated in Figure 20.
DAC
INTEGRATOR
ANALOG
INPUT
DIFFERENCE
AMP
COMPARATOR
HIGH-
FREQUENCY
BITSTREAM
TO DIGITAL
FILTER
Figure 20. Sigma-Delta Modulator Simplified Block Diagram
In operation, the analog signal sample is fed to the differ-
ence amplifier along with the output of the feedback DAC. T he
difference between these two signals is integrated and fed
to the comparator. T he output of the comparator provides the
input to the feedback DAC so the system functions as a negative
feedback loop that tries to minimize the difference signal. T he